Daian Yue, Vania Joloboff, Frédéric Mallet. Flexible runtime verification based on logical clock constraints. In Rolf Drechsler, Robert Wille, editors, 2016 Forum on Specification and Design Languages, FDL 2016, Bremen, Germany, September 14-16, 2016. pages 1-8, IEEE, 2016. [doi]
Abstract is missing.