Syed Azhar Ali Zaidi, Muhammad Awais, Carlo Condo, Maurizio Martina, Guido Masera. FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. In 2013 Conference on Design and Architectures for Signal and Image Processing, Cagliari, Italy, October 8-10, 2013. pages 190-195, IEEE, 2013. [doi]
Abstract is missing.