Table of Contents

• Welcome to the 2013 conference on design and architectures for signal and image processing (DASIP) in Cagliari, ItalyPaolo Meloni, Christophe Jégo. 8 [doi]
• Session 1: Vision and image processing architecturesBertrand Granado. 13 [doi]
• High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecsTiago Dias, Nuno Roma, Leonel Sousa. 14-21 [doi]
• Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clustersPaolo Burgio, Andrea Marongiu, Robin Danilo, Philippe Coussy, Luca Benini. 22-29 [doi]
• A neural model for hardware plasticity in artificial vision systemsLaurent Rodriguez, Laurent Fiack, Benoit Miramond. 30-37 [doi]
• A novel graphics processor architecture based on partial stream rewritingLars Middendorf, Christian Haubelt. 38-45 [doi]
• Session 2: Tools for DSP algorithm implementationFrancesca Palumbo. 46 [doi]
• Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systemsSimone Casale Brunet, Claudio Alberti, Marco Mattavelli, Jörn W. Janneck. 47-54 [doi]
• System-level PMC-driven energy estimation models in RVC-CAL video codec specificationsRong Ren, E. Juarez, C. Sanz, Mickaël Raulet, Fernando Pescador. 55-62 [doi]
• Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case studyAb Al Hadi Ab Rahman, Simone Casale Brunet, Claudio Alberti, Marco Mattavelli. 63-70 [doi]
• Modeling control tokens for composition of CAL actorsJohan Ersfolk, Ghislain Roquier, Johan Lilius, Marco Mattavelli. 71-78 [doi]
• Session 3 (special session): Visual scene analysis in 2D and 3DMarek Gorgon, Lionel Lacassagne. 79 [doi]
• A resource-aware nearest-neighbor search algorithm for k-dimensional treesJohny Paul, Walter Stechele, Manfred Kröhnert, Tamim Asfour, Benjamin Oechslein, Christoph Erhardt, Jens Schedel, Daniel Lohmann, Wolfgang Schröder-Preikschat. 80-87 [doi]
• Accuracy and performance analysis of Harris Corner computation on tightly-coupled processor arraysEricles Rodrigues Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich. 88-95 [doi]
• Real-time RGB-D data processing on GPU architectureMassimo Camplani, A. Blasco, Daniel Berjón, Luis Salgado, Francisco Morán. 96-103 [doi]
• Real-time covariance tracking algorithm for embedded systemsAndrés Romero Mier y Terán, Lionel Lacassagne, Ali Hassan Zahraee, Michèle Gouiffès. 104-111 [doi]
• Session 4 (special session): Modern localisation techniquesJari Nurmi. 112 [doi]
• A linear state model for PDR+WLAN positioningMatti Raitoharju, Henri Nurminen, Robert Piché. 113-118 [doi]
• Constrained non-linear fitting for stochastic modeling of inertial sensorsAlex G. Quinchia, Carles Ferrer, Gianluca Falco, Fabio Dovis. 119-125 [doi]
• Effects of colored noise in Linear Adaptive Filters applied to GNSS multipath detectionSabrina Ugazio, Letizia Lo Presti. 126-133 [doi]
• Session 5: Image processing applications and systemsSebastián López. 134 [doi]
• SiPM based smart pixel for photon counting integrated streak cameraImane Malass, Wilfried Uhring, Jean-Pierre Le Normand, Norbert Dumas, Virginie Zint, Foudil Dadouche. 135-140 [doi]
• A coarse-grained reconfigurable wavelet denoiser exploiting the Multi-Dataflow Composer toolNicola Carta, Carlo Sau, Francesca Palumbo, Danilo Pani, Luigi Raffo. 141-148 [doi]
• A runtime adaptive H.264 video-decoding MPSoC platformGiuseppe Tuveri, Simone Secchi, Paolo Meloni, Luigi Raffo, Emanuele Cannella. 149-156 [doi]
• Foreground object features extraction with GLCM texture descriptor in FPGAMateusz Komorkiewicz, Marek Gorgon. 157-164 [doi]
• Session 6: Smart and adaptive devicesBenoit Miramond. 165 [doi]
• A hierarchical Ant-Colony heuristic for architecture synthesis for on-chip communicationWei Tang, Forrest Brewer. 166-173 [doi]
• Smart sensor architectures for embedded biosignal analysisBenjamin Pfundt, Marc Reichenbach, Björn Eskofier, Dietmar Fey. 174-181 [doi]
• Noise-agnostic adaptive image filtering without training references on an evolvable hardware platformJavier Mora, Angel Gallego, Andrés Otero, Eduardo de la Torre, Teresa Riesgo. 182-189 [doi]
• FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memoriesSyed Azhar Ali Zaidi, Muhammad Awais, Carlo Condo, Maurizio Martina, Guido Masera. 190-195 [doi]
• Session 7 (special session): Advanced image processing for space applicationsEduardo Juárez. 196 [doi]
• Airport markings recognition for automatic taxiingFederico Francesco Barresi, Walter Allasia. 197-200 [doi]
• Stereo vision system for capture and removal of space debrisFrancesco Rosso, Francesco Gallo, Walter Allasia, Enrico Licata, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alain Favetto, Marco Paleari, Paolo Ariano. 201-207 [doi]
• Session 8: 3D vision systems and applicationsWilfried Uhring. 208 [doi]
• Real-time GPU-based local stereo matching methodJinglin Zhang, Jean-François Nezan, Maxime Pelcat, Jean-Gabriel Cousin. 209-214 [doi]
• New 3D-integrated burst image sensor architectures with in-situ A/D conversionR. Bonnard, Fabrice Guellec, J. Segura, Antoine Dupret, W. Uhring. 215-222 [doi]
• Extension and FPGA architecture of the Generalized Hough Transform for real-time stereo correspondenceFrank Schumacher, Thomas Greiner. 223-229 [doi]
• Session 9 (special session): Software defined radioJulien Le Kernec, Olivier Romain. 230 [doi]
• An efficient GPU implementation of an arbitrary resampling polyphase channelizerScott C. Kim, William Plishker, Shuvra S. Bhattacharyya. 231-238 [doi]
• Low-cost guaranteed-throughput communication ring for real-time streaming MPSoCsBerend H. J. Dekens, Philip Wilmanns, Marco Jan Gerrit Bekooij, Gerard J. M. Smit. 239-246 [doi]
• Design of a matched filter for timing synchronizationRoberto Airoldi, Jari Nurmi. 247-251 [doi]
• A 3D reconstruction from real-time stereoscopic images using GPUJose-Ernesto Gomez-Balderas, D. Houzet. 253-258 [doi]
• Accelerating a modified Gaussian pyramid with a customized processorDiana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria. 259-264 [doi]
• Communication cost reduction for hardware tasks placed on homogeneous reconfigurable resourceQuang-Hai Khuat, Daniel Chillet. 265-270 [doi]
• Design and analysis of an FPGA based encoder SoC for locally stationary image sourceYuhui Bai, Syed Zahid Ahmed, Bertrand Granado. 271-278 [doi]
• Efficient bit decoding implementation for mass market multi-constellation GNSS receiversTommi Paakki, Jussi Raasakka, Francescantonio Della Rosa, Jari Nurmi. 279-283 [doi]
• Embedded vision-based SLAM: A model-driven approachJonathan Piat, David A. Marquez-Gamez, Michel Devy. 284-289 [doi]
• Evaluation of an RTOS on top of a hosted virtual machine systemMehdi Aïchouch, Jean-Christophe Prévotet, Fabienne Nouvel. 290-297 [doi]
• Exploring frequency tuning policies for USRP-N210 SDR platform and GNU radioIslam Galal, Mostafa E. A. Ibrahim, Hossam E. Ahmed. 298-303 [doi]
• Memory access analysis and optimization of a parallel H.264/SVC decoder for an embedded multi-core platformJens Brandenburg, Benno Stabernack. 304-311 [doi]
• A novel inter-layer intra prediction architecture for real-time SVC video codecsYeray Hernandez, Sebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento. 312-318 [doi]
• Particle filters and resampling techniques: Importance in computational complexity analysisB. G. Sileshi, C. Ferrer, J. Oliver. 319-325 [doi]
• Task migration of DSP application specified with a DFG and implemented with the BSP computing model on a CPU-GPU clusterFarouk Mansouri, Sylvain Huet, Vincent Fristot, Dominique Houzet. 326-333 [doi]
• Tetrahedral volume reconstruction in X-ray tomography using GPU architectureMichele A. Quinto, Dominique Houzet, Fanny Buyens. 334-339 [doi]
• Design space exploration and implementation of RVC-CAL applications using the TURNUS frameworkSimone Casale Brunet, Endri Bezati, Claudio Alberti, Ghislain Roquier, Marco Mattavelli, Jörn W. Janneck, Jani Boutellier. 341-342 [doi]
• Dynamic source code analysis for memory hierarchy optimization in multimedia applicationsChristakis Lezos, Grigoris Dimitroulakos, Angeliki Freskou, Konstantinos Masselos. 343-344 [doi]
• Evaluation of driver assistance systems with a car simulator using a virtual and a real FPGA platformPhilipp Wehner, Diana Göhringer. 345-346 [doi]
• Framework for fast prototyping of applications running on reconfigurable system on chipJan Viktorin, Pavol Korcek, Vlastimil Kosar, Jan Korenek. 347-348 [doi]
• Networked embedded acoustic processing system for smart building applicationsSebastian Uziel, Thomas Elste, Wolfram Kattanek, Danilo Hollosi, Stephan Gerlach, Stefan Goetze. 349-350 [doi]
• A noise-agnostic self-adaptive image processing application based on evolvable hardwareJavier Mora, Angel Gallego, Andrés Otero, Blanca Lopez, Eduardo de la Torre, Teresa Riesgo. 351-352 [doi]
• A prototype of an adaptive computer vision algorithm on MPSoC architectureEricles Rodrigues Sousa, Alexandru Tanase, Frank Hannig, Jürgen Teich. 353-354 [doi]
• Prototype of a novel steady-state load identification technique for digitally controlled DC-DC power suppliesAndrea Congiu, Massimo Barbaro, Andrea Picciau, Emanuele Bodano, Dirk Hammerschmidt. 355-356 [doi]
• Spatial edge directed video deinterlacingPrateek Murgai, Maria Trocan. 357-358 [doi]