Javier Zalamea, Josep Llosa, Eduard Ayguadé, Mateo Valero. Modulo scheduling with integrated register spilling for clustered VLIW architectures. In Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001. pages 160-169, ACM/IEEE, 2001. [doi]
Abstract is missing.