A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors

Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe. A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. In 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings. pages 84-89, IEEE Computer Society, 2003. [doi]

@inproceedings{Zarkesh-HaDLSSP03,
  title = {A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors},
  author = {Payman Zarkesh-Ha and Ken Doniger and William Loh and Dechang Sun and Rick Stephani and Gordon Priebe},
  year = {2003},
  url = {http://csdl.computer.org/comp/proceedings/iccd/2003/2025/00/20250084abs.htm},
  tags = {analysis, design},
  researchr = {https://researchr.org/publication/Zarkesh-HaDLSSP03},
  cites = {0},
  citedby = {0},
  pages = {84-89},
  booktitle = {21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2025-1},
}