Jindrich Zejda, Li Ding 0002. TBNM - Transistor-Level Boundary Model for Fast Gate-Level Noise Analysis of Macro Blocks. In 7th International Symposium on Quality of Electronic Design (ISQED 2006), 27-29 March 2006, San Jose, CA, USA. pages 147-152, IEEE Computer Society, 2006. [doi]
Abstract is missing.