An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay models

Yiqian Zhang, Xianlong Hong, Yici Cai. An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay models. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 97-100, IEEE, 2005. [doi]

@inproceedings{ZhangHC05:1,
  title = {An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay models},
  author = {Yiqian Zhang and Xianlong Hong and Yici Cai},
  year = {2005},
  doi = {10.1109/ISCAS.2005.1464533},
  url = {http://dx.doi.org/10.1109/ISCAS.2005.1464533},
  tags = {routing},
  researchr = {https://researchr.org/publication/ZhangHC05%3A1},
  cites = {0},
  citedby = {0},
  pages = {97-100},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan},
  publisher = {IEEE},
}