A DMR logic for mitigating the SET induced soft errors in combinational circuits

Jiajin Zhang, Yang Housen, Yankang Du, Gao Quan, Peng Lin, Zhang Yue, Lichang Chen. A DMR logic for mitigating the SET induced soft errors in combinational circuits. IEICE Electronic Express, 13(2):20150927, 2016. [doi]

Abstract

Abstract is missing.