Unified DRAM and NVM hybrid buffer cache architecture for reducing journaling overhead

Zhiyong Zhang, Lei Ju, Zhiping Jia. Unified DRAM and NVM hybrid buffer cache architecture for reducing journaling overhead. In Luca Fanucci, Jürgen Teich, editors, 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016. pages 942-947, IEEE, 2016. [doi]

Authors

Zhiyong Zhang

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Lei Ju

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Zhiping Jia

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