Simplified delay design guidelines for on-chip global interconnects

Liang Zhang, Wentai Liu, Rizwan Bashirullah, John Wilson, Paul D. Franzon. Simplified delay design guidelines for on-chip global interconnects. In David Garrett, John Lach, Charles A. Zukowski, editors, Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004. pages 29-32, ACM, 2004. [doi]

@inproceedings{ZhangLBWF04,
  title = {Simplified delay design guidelines for on-chip global interconnects},
  author = {Liang Zhang and Wentai Liu and Rizwan Bashirullah and John Wilson and Paul D. Franzon},
  year = {2004},
  doi = {10.1145/988952.988960},
  url = {http://doi.acm.org/10.1145/988952.988960},
  tags = {design},
  researchr = {https://researchr.org/publication/ZhangLBWF04},
  cites = {0},
  citedby = {0},
  pages = {29-32},
  booktitle = {Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, Boston, MA, USA, April 26-28, 2004},
  editor = {David Garrett and John Lach and Charles A. Zukowski},
  publisher = {ACM},
  isbn = {1-58113-853-9},
}