Hardware architecture optimization for high-frequency zeroing and LFNST in H.266/VVC based on FPGA

Junxiang Zhang, Qinghua Sheng, Rui Pan, Jiawei Wang, Kuan Qin, Xiaofang Huang, Xiaoyan Niu. Hardware architecture optimization for high-frequency zeroing and LFNST in H.266/VVC based on FPGA. J. Real-Time Image Processing, 21(3):90, May 2024. [doi]

Abstract

Abstract is missing.