Kai Zhang, Tsuyoshi Shinogi, Haruhiko Takase, Terumine Hayashi. A Method for Evaluating Upper Bound of Simultaneous Switching Gates Using Circuit Partition. In Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong. pages 291-294, IEEE, 1999. [doi]
Abstract is missing.