BIST approach for testing configurable logic and memory resources in FPGAs

Zhiquan Zhang, Zhiping Wen, Lei Chen, Tao Zhou, Fan Zhang. BIST approach for testing configurable logic and memory resources in FPGAs. In IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008. pages 1767-1770, IEEE, 2008. [doi]

@inproceedings{ZhangWCZZ08,
  title = {BIST approach for testing configurable logic and memory resources in FPGAs},
  author = {Zhiquan Zhang and Zhiping Wen and Lei Chen and Tao Zhou and Fan Zhang},
  year = {2008},
  doi = {10.1109/APCCAS.2008.4746383},
  url = {http://dx.doi.org/10.1109/APCCAS.2008.4746383},
  researchr = {https://researchr.org/publication/ZhangWCZZ08},
  cites = {0},
  citedby = {0},
  pages = {1767-1770},
  booktitle = {IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2008, Macao, China, November 30 2008 - December 3, 2008},
  publisher = {IEEE},
}