Meng Zhang, Fei Wu, He Huang, Qian Xia, Jian Zhou, Changsheng Xie. FPGA-based failure mode testing and analysis for MLC NAND flash memory. In David Atienza, Giorgio Di Natale, editors, Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017. pages 434-439, IEEE, 2017. [doi]
@inproceedings{ZhangWHXZX17,
title = {FPGA-based failure mode testing and analysis for MLC NAND flash memory},
author = {Meng Zhang and Fei Wu and He Huang and Qian Xia and Jian Zhou and Changsheng Xie},
year = {2017},
doi = {10.23919/DATE.2017.7927029},
url = {https://doi.org/10.23919/DATE.2017.7927029},
researchr = {https://researchr.org/publication/ZhangWHXZX17},
cites = {0},
citedby = {0},
pages = {434-439},
booktitle = {Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017},
editor = {David Atienza and Giorgio Di Natale},
publisher = {IEEE},
isbn = {978-3-9815370-8-6},
}