FPGA implementation of a scheduler supporting parallel dataflow execution - researchr publication authors

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Junneng Zhang, Chao Wang, Xi Li, Xuehai Zhou. FPGA implementation of a scheduler supporting parallel dataflow execution. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 1216-1219, IEEE, 2013. [doi]

This author has not been identified. Look up 'Junneng Zhang' in GoogleThis author has not been identified. Look up 'Chao Wang' in GoogleThis author has not been identified. Look up 'Xi Li' in GoogleThis author has not been identified. Look up 'Xuehai Zhou' in Google

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