Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm - researchr publication authors

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Chao Zhang, Wenjian Yu. Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 756-761, IEEE, 2014. [doi]

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