Chao Zhang, Wenjian Yu. Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm. In 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014. pages 756-761, IEEE, 2014. [doi]
@inproceedings{ZhangY14-3,
title = {Efficient techniques for the capacitance extraction of chip-scale VLSI interconnects using floating random walk algorithm},
author = {Chao Zhang and Wenjian Yu},
year = {2014},
doi = {10.1109/ASPDAC.2014.6742981},
url = {http://dx.doi.org/10.1109/ASPDAC.2014.6742981},
researchr = {https://researchr.org/publication/ZhangY14-3},
cites = {0},
citedby = {0},
pages = {756-761},
booktitle = {19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014, Singapore, January 20-23, 2014},
publisher = {IEEE},
}