Design and Evaluation of Fluctuating Power Logic to Mitigate Power Analysis at the Cell Level

Fan Zhang 0010, Bolin Yang, Bojie Yang, Yiran Zhang, Xuanle Ren, Shivam Bhasin, Kui Ren 0001. Design and Evaluation of Fluctuating Power Logic to Mitigate Power Analysis at the Cell Level. IEEE Trans. on CAD of Integrated Circuits and Systems, 40(6):1063-1076, 2021. [doi]

@article{ZhangYYZRBR21,
  title = {Design and Evaluation of Fluctuating Power Logic to Mitigate Power Analysis at the Cell Level},
  author = {Fan Zhang 0010 and Bolin Yang and Bojie Yang and Yiran Zhang and Xuanle Ren and Shivam Bhasin and Kui Ren 0001},
  year = {2021},
  doi = {10.1109/TCAD.2020.3023900},
  url = {https://doi.org/10.1109/TCAD.2020.3023900},
  researchr = {https://researchr.org/publication/ZhangYYZRBR21},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {40},
  number = {6},
  pages = {1063-1076},
}