Efficient FPGA Routing Architecture Exploration Based on Two-Stage MUXes

Jide Zhang, Kaixiang Zhu, Kaichuang Shi, Lingli Wang, Hao Zhou. Efficient FPGA Routing Architecture Exploration Based on Two-Stage MUXes. In 15th IEEE International Conference on ASIC, ASICON 2023, Nanjing, China, October 24-27, 2023. pages 1-4, IEEE, 2023. [doi]

Authors

Jide Zhang

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Kaixiang Zhu

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Kaichuang Shi

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Lingli Wang

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Hao Zhou

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