Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs - researchr publication authors

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Xin Zhao, Sung Kyu Lim. Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs. In Proceedings of the 15th Asia South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, Taiwan, January 18-21, 2010. pages 175-180, IEEE, 2010. [doi]

This author has not been identified. Look up 'Xin Zhao' in GoogleThis author has not been identified. Look up 'Sung Kyu Lim' in Google

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