Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs

Xin Zhao, Sung Kyu Lim. Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs. In Proceedings of the 15th Asia South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, Taiwan, January 18-21, 2010. pages 175-180, IEEE, 2010. [doi]

@inproceedings{ZhaoL10-9,
  title = {Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs},
  author = {Xin Zhao and Sung Kyu Lim},
  year = {2010},
  doi = {10.1109/ASPDAC.2010.5419900},
  url = {http://dx.doi.org/10.1109/ASPDAC.2010.5419900},
  tags = {context-aware, design},
  researchr = {https://researchr.org/publication/ZhaoL10-9},
  cites = {0},
  citedby = {0},
  pages = {175-180},
  booktitle = {Proceedings of the 15th Asia South Pacific Design Automation Conference, ASP-DAC 2010, Taipei, Taiwan, January 18-21, 2010},
  publisher = {IEEE},
  isbn = {978-1-60558-837-7},
}