Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test - researchr publication authors

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Wei Zhao, Junxia Ma, Mohammad Tehranipoor, Sreejit Chakravarty. Power-Safe Application of Transition Delay Fault Patterns Considering Current Limit during Wafer Test. In Proceedings of the 19th IEEE Asian Test Symposium, ATS 2010, 1-4 December 2010, Shanghai, China. pages 301-306, IEEE Computer Society, 2010. [doi]

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