Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms

Qinghang Zhao, Wenyu Sun, Jiaqing Zhao, Jian Zhao 0004, Hailong Yao, Tsung-Yi Ho, Xiaojun Guo, Huazhong Yang, Yongpan Liu. Design Methodology for TFT-Based Pseudo-CMOS Logic Array With Multilayer Interconnection Architecture and Optimization Algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems, 38(11):2043-2057, 2019. [doi]

Abstract

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