Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability - researchr publication

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Yexin Zheng, Chao Huang. Defect-aware logic mapping for nanowire-based programmable logic arrays via satisfiability. In Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009. pages 1279-1283, IEEE, 2009. [doi]

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