Verification of Timed Circuits with Failure Directed Abstractions

Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda. Verification of Timed Circuits with Failure Directed Abstractions. In 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings. pages 28-35, IEEE Computer Society, 2003. [doi]

Abstract

Abstract is missing.