Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

Ning Zhu, Wang Ling Goh, Weija Zhang, Kiat Seng Yeo, Zhi-Hui Kong. Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing. IEEE Trans. VLSI Syst., 18(8):1225-1229, 2010. [doi]

Authors

Ning Zhu

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Wang Ling Goh

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Weija Zhang

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Kiat Seng Yeo

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Zhi-Hui Kong

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