An Efficient Hardware Accelerator for Structured Sparse Convolutional Neural Networks on FPGAs

Chaoyang Zhu, Kejie Huang, Shuyuan Yang, Ziqi Zhu, Hejia Zhang, Haibin Shen. An Efficient Hardware Accelerator for Structured Sparse Convolutional Neural Networks on FPGAs. IEEE Trans. VLSI Syst., 28(9):1953-1965, 2020. [doi]

Abstract

Abstract is missing.