MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique

Zhen Zhuang, Genggeng Liu, Xing Huang, Xiaotao Jia, Wen-Hao Liu, Wenzhong Guo. MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique. In Tinoosh Mohsenin, Weisheng Zhao, Yiran Chen, Onur Mutlu, editors, GLSVLSI '20: Great Lakes Symposium on VLSI 2020, Virtual Event, China, September 7-9, 2020. pages 107-112, ACM, 2020. [doi]

Abstract

Abstract is missing.