Table of Contents

• Deep Learning Processors for On-Device IntelligenceHoi-Jun Yoo. 1-8 [doi]
• SNEAP: A Fast and Efficient Toolchain for Mapping Large-Scale Spiking Neural Network onto NoC-based Neuromorphic PlatformShiming Li, Shasha Guo, Limeng Zhang, Ziyang Kang, Shiying Wang, Wei Shi, Lei Wang, Weixia Xu. 9-14 [doi]
• SIP: Boosting Up Graph Computing by Separating the Irregular Property DataJiaCheng Ni, Xiaochen Guo, Yuanqing Cheng. 15-20 [doi]
• On-chip Memory Optimized CNN Accelerator with Efficient Partial-sum AccumulationHongjie Xu, Jun Shiomi, Hidetoshi Onodera. 21-26 [doi]
• BPhoton-CNN: An Ultrafast Photonic Backpropagation Accelerator for Deep LearningDharanidhar Dang, Aurosmita Khansama, Rabi N. Mahapatra, Debashis Sahoo. 27-32 [doi]
• Reliable and Robust RRAM-based Neuromorphic ComputingGrace Li Zhang, Bing Li 0005, Ying Zhu, Shuhang Zhang, Tianchen Wang, Yiyu Shi, Tsung-Yi Ho, Hai (Helen) Li, Ulf Schlichtmann. 33-38 [doi]
• Modeling and Benchmarking Computing-in-Memory for Design Space ExplorationDayane Reis, Di Gao, Shaahin Angizi, Xunzhao Yin, Deliang Fan, Michael T. Niemier, Cheng Zhuo, Xiaobo Sharon Hu. 39-44 [doi]
• IMC-Sort: In-Memory Parallel Sorting Architecture using Hybrid Memory CubeZheyu Li, Nagadastagiri Challapalle, Akshay Krishna Ramanathan, Vijaykrishnan Narayanan. 45-50 [doi]
• Deep Neural Network accelerator with Spintronic MemoryHe Zhang, Wang Kang, Youguang Zhang, Weisheng Zhao. 51 [doi]
• Towards Programmable All-Digital True Random Number GeneratorRashmi Agrawal, Lake Bu, Eliakin Del Rosario, Michel A. Kinsy. 53-58 [doi]
• Boosting Entropy Extraction of PDL-based RO PUF by High-order Difference MethodLiang Zheng, Changting Li, Zongbin Liu, Cunqing Ma. 59-64 [doi]
• A Modeling Attack Resilient Physical Unclonable Function Based on STT-MRAMZhengyi Hou, You Wang, Deming Zhang, Chengzhi Wang, Hao Cai. 65-70 [doi]
• Reliability-Enhanced Circuit Design Flow Based on Approximate Logic SynthesisZuodong Zhang, Runsheng Wang, Zhe Zhang, Ru Huang, Chang Meng, Weikang Qian, Zhuangzhuang Zhou. 71-76 [doi]
• Energy-Efficient Machine Learning Accelerator for Binary Neural NetworksWei Mao, Zhihua Xiao, Peng Xu, Hongwei Ren, Dingbang Liu, Shirui Zhao, Fengwei An, Hao Yu 0001. 77-82 [doi]
• MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing SystemsZhenhua Zhu, Hanbo Sun, Kaizhong Qiu, Lixue Xia, Gokul Krishnan, Guohao Dai, Dimin Niu, Xiaoming Chen, Xiaobo Sharon Hu, Yu Cao, Yuan Xie, Yu Wang, Huazhong Yang. 83-88 [doi]
• A Review of In-Memory Computing Architectures for Machine Learning ApplicationsSathwika Bavikadi, Purab Ranjan Sutradhar, Khaled N. Khasawneh, Amlan Ganguly, Sai Manoj Pudukotai Dinakarrao. 89-94 [doi]
• Exploiting Disturbance-Aware Read Redirection for Performance Improvement in 3D Flash MemoryJinhua Cui, Weiguang Liu, Jianhang Huang, Laurence T. Yang. 95-100 [doi]
• Verification of Embedded Binaries using Coverage-guided Fuzzing with SystemC-based Virtual PrototypesVladimir Herdt, Daniel Große, Jonas Wloka, Tim Güneysu, Rolf Drechsler. 101-106 [doi]
• MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing TechniqueZhen Zhuang, Genggeng Liu, Xing Huang, Xiaotao Jia, Wen-Hao Liu, Wenzhong Guo. 107-112 [doi]
• A Tile-based Interconnect Model for FPGA Architecture ExplorationChengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai. 113-118 [doi]
• A Privacy-Preserving-Oriented DNN Pruning and Mobile Acceleration FrameworkYifan Gong, Zheng Zhan 0001, Zhengang Li, Wei Niu, Xiaolong Ma, Wenhao Wang, Bin Ren, Caiwen Ding, Xue Lin, Xiaolin Xu, Yanzhi Wang. 119-124 [doi]
• Robust Sparse Regularization: Defending Adversarial Attacks Via Regularized Sparse NetworkAdnan Siraj Rakin, Zhezhi He, Li Yang, Yanzhi Wang, Liqiang Wang, Deliang Fan. 125-130 [doi]
• Energy-Efficient Hardware for Language Guided Reinforcement LearningAidin Shiri, Arnab Neelim Mazumder, Bharat Prakash, Nitheesh Kumar Manjunath, Houman Homayoun, Avesta Sasan, Nicholas R. Waytowich, Tinoosh Mohsenin. 131-136 [doi]
• Towards Self-Aware Systems-on-Chip Through Intelligent Cross-Layer CoordinationFadi J. Kurdahi. 137 [doi]
• An Approximate Carry Estimating Simultaneous Adder with RectificationRajat Bhattacharjya, Vishesh Mishra, Saurabh Singh, Kaustav Goswami, Dip Sankar Banerjee. 139-144 [doi]
• Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic CircuitsRongliang Fu, Zhimin Zhang, Guang-Ming Tang, Junying Huang, Xiaochun Ye, Dongrui Fan, Ninghui Sun. 145-150 [doi]
• SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable AccuracyZahra Ebrahimi, Salim Ullah, Akash Kumar 0001. 151-156 [doi]
• Accelerating Deterministic Stochastic Computing with Context-Aware Bit-stream GeneratorSina Asadi, M. Hassan Najafi. 157-162 [doi]
• The Evolution of Transient-Execution AttacksClaudio Canella, Khaled N. Khasawneh, Daniel Gruss. 163-168 [doi]
• Evolution of Defenses against Transient-Execution AttacksClaudio Canella, Sai Manoj Pudukotai Dinakarrao, Daniel Gruss, Khaled N. Khasawneh. 169-174 [doi]
• StealthMiner: Specialized Time Series Machine Learning for Run-Time Stealthy Malware Detection based on Microarchitectural FeaturesHossein Sayadi, Yifeng Gao, Hosein Mohammadi Makrani, Tinoosh Mohsenin, Avesta Sasan, Setareh Rafatirad, Jessica Lin 0001, Houman Homayoun. 175-180 [doi]
• Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel AttacksHan Wang, Hossein Sayadi, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Houman Homayoun. 181-186 [doi]
• Fast ECO Leakage Optimization Using Graph Convolutional NetworkWonjae Lee, Yonghwi Kwon, Youngsoo Shin. 187-192 [doi]
• An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System Co-design and Self-adaptive Approximate Computing Based BWNBo Liu 0019, Yuhao Sun, Hao Cai, Zeyu Shen, Yu Gong, Lepeng Huang, Zhen Wang 0019. 193-198 [doi]
• TUPIM: A Transparent and Universal Processing-in-Memory Architecture for Unmodified BinariesSheng Xu, Xiaoming Chen 0003, Xuehai Qian, Yinhe Han. 199-204 [doi]
• Power-Efficient Approximate Multiplier Using Adaptive Error CompensationZhixi Yang, Honglan Jiang, Xianbin Li, Jun Yang. 205-210 [doi]
• Trust Issues in COTS: The Challenges and Emerging SolutionTamzidul Hoque, Patanjali SLPSK, Swarup Bhunia. 211-216 [doi]
• On Designing Secure and Robust Scan Chain for Protecting Obfuscated LogicHadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan. 217-222 [doi]
• A New Aging Sensor for the Detection of Recycled ICsZhichao Xu, Aijiao Cui, Gang Qu. 223-228 [doi]
• Security Challenges of Processing-In-Memory SystemsMd Tanvir Arafin, Zhaojun Lu. 229-234 [doi]
• LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-ChipFebin Sunny, Asif Mirza, Ishan G. Thakkar, Sudeep Pasricha, Mahdi Nikdast. 235-240 [doi]
• Energy-Efficient On-Chip Networks through Profiled Hybrid SwitchingYuan He 0002, Jinyu Jiao, Thang Cao, Masaaki Kondo. 241-246 [doi]
• Redesigning Photonic Interconnects with Silicon-on-Sapphire Device Platform for Ultra-Low-Energy On-Chip CommunicationVenkata Sai Praneeth Karempudi, Sairam Sri Vatsavayi, Ishan G. Thakkar. 247-252 [doi]
• COCOA: Content-Oriented Configurable Architecture Based on Highly-Adaptive Data Transmission NetworksTian Xia, Pengchen Zong, Haoran Zhao, Jianming Tong, Wenzhe Zhao, Nanning Zheng 0001, Pengju Ren. 253-258 [doi]
• An In-memory Highly Reconfigurable Logic Circuit Based on Diode-assisted Enhanced Magnetoresistance DeviceZhe Huang, Yue Zhang 0010, Kun Zhang, Zhizhong Zhang, Jinkai Wang, Youguang Zhang, Weisheng Zhao. 259-264 [doi]
• In-Memory Computing: The Next-Generation AI Computing ParadigmYufei Ma, Yuan Du, Li Du, Jun Lin, Zhongfeng Wang. 265-270 [doi]
• A Background Noise Self-adaptive VAD Using SNR Prediction Based Precision Dynamic Reconfigurable Approximate ComputingBo Liu 0019, Yan Li 0056, Lepeng Huang, Hao Cai, Wentao Zhu, Shisheng Guo, Yu Gong, Zhen Wang 0019. 271-275 [doi]
• Exploring DNA Alignment-in-Memory Leveraging Emerging SOT-MRAMShaahin Angizi, Wei Zhang 0076, Deliang Fan. 277-282 [doi]
• Effective Algorithm-Accelerator Co-design for AI Solutions on Edge DevicesCong Hao, Yao Chen, Xiaofan Zhang, Yuhong Li, Jinjun Xiong, Wen-mei Hwu, Deming Chen. 283-290 [doi]
• ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive Random-Access MemoryZhuoran Song, Yilong Zhao, Yanan Sun, Xiaoyao Liang, Li Jiang 0002. 291-296 [doi]
• Early Verification of ISA Extension Specifications using Deep Reinforcement LearningNiklas Bruns, Daniel Große, Rolf Drechsler. 297-302 [doi]
• Synthesizing A Generalized Brain-inspired Interconnection Network for Large-scale Network-on-chip SystemsMengke Ge, Qi Xu, Huajie Ruan, Xiaobing Ni, Song Chen 0001, Yi Kang. 303-308 [doi]
• A Learning-Based Timing Prediction Framework for Wide Supply Voltage DesignWei Bao, Peng Cao, Hao Cai, Aiguo Bu. 309-314 [doi]
• Security Analysis of Hardware Trojans on Approximate CircuitsYuqin Dou, Shichao Yu, Chongyan Gu, Máire O'Neill, Chenghua Wang, Weiqiang Liu. 315-320 [doi]
• Side Channel Attacks vs Approximate ComputingFrancesco Regazzoni 0001, Ilia Polian. 321-326 [doi]
• Blurring Boundaries: A New Way to Secure Approximate Computing SystemsPruthvy Yellu, Landon Buell, Dongpeng Xu, Qiaoyan Yu. 327-332 [doi]
• Is It Approximate Computing or Malicious Computing?Ye Wang, Jian Dong, Qian Xu, Zhaojun Lu, Gang Qu. 333-338 [doi]
• Redundant Neurons and Shared Redundant Synapses for Robust Memristor-based DNNs with Reduced OverheadBaogang Zhang, Necati Uysal, Deliang Fan, Rickard Ewetz. 339-344 [doi]
• Enabling Resistive-RAM-based Activation Functions for Deep Neural Network AccelerationZihan Zhang, Taozhong Li, Ning Guan, Qin Wang 0009, Guanghui He, Weiguang Sheng, Zhigang Mao, Naifeng Jing. 345-350 [doi]
• A Novel In-memory Computing Scheme Based on Toggle Spin Torque MRAMYining Bai, Yue Zhang 0010, Jinkai Wang, Guanda Wang, Zhizhong Zhang, Zhenyi Zheng, Kun Zhang, Weisheng Zhao. 351-356 [doi]
• An Order Sampling Processing-in-Memory Architecture for Approximate Graph Pattern MiningZiqian Wan, Guohao Dai, Yun Joon Soh, Jishen Zhao, Yu Wang 0002. 357-362 [doi]
• AxR-NN: Approximate Computation Reuse for Energy-Efficient Convolutional Neural NetworksDongning Ma, Xunzhao Yin, Michael T. Niemier, Xiaobo Sharon Hu, Xun Jiao. 363-368 [doi]
• Design Insights of Non-volatile Processors and Accelerators in Energy Harvesting SystemsKeni Qiu, Mengying Zhao, Zhenge Jia, Jingtong Hu, Chun Jason Xue, Kaisheng Ma, Xueqing Li, Yongpan Liu, Vijaykrishnan Narayanan. 369-374 [doi]
• Dual-Plane Switch Architecture for Time-Triggered EthernetMeng Dong, Zhiliang Qiu, Weitao Pan, Hongbin Zhang, Chenglei Kong, Hui Jin, Jianlei Yang 0001. 375-379 [doi]
• Fast Consistency Auditing for Massive Industrial Data in Untrusted Cloud ServicesJingxian Cheng, Saiyu Qi, Wenqing Wang, Yuchen Yang, Yong Qi. 381-386 [doi]
• Litho-NeuralODE: Improving Hotspot Detection Accuracy with Advanced Data Augmentation and Neural Ordinary Differential EquationsWei Lu, Yuhang Zhang, Qing Zhang, Xinjie Zhang, Yongfu Li. 387-392 [doi]
• A Constraint-Driven Compact Model with Partition Strategy for Ordered Escape RoutingZhaopo Liao, Sheqin Dong. 393-398 [doi]
• Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum WirelengthWei Wang, Vasilis F. Pavlidis, Yuanqing Cheng. 399-404 [doi]
• Cost Estimation for Configurable Model-Driven SoC Designs Using Machine LearningLorenzo Servadei, Edoardo Mosca, Keerthikumara Devarajegowda, Michael Werner, Wolfgang Ecker, Robert Wille. 405-410 [doi]
• Latency Variation Aware Read Performance Optimization on 3D High Density NAND Flash MemoryYina Lv, Liang Shi, Chun Joseph Xue, Qingfeng Zhuge, Edwin H.-M. Sha. 411-414 [doi]
• HTcatcher: Finite State Machine and Feature Verifcation for Large-scale Neuromorphic Computing SystemsGuorong He, Chen Dong, Xing Huang, Wenzhong Guo, Ximeng Liu, Tsung-Yi Ho. 415-420 [doi]
• A Hybrid Synthesis Methodology for Approximate CircuitsMuhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner. 421-426 [doi]
• Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural Network ProcessorSegi Lee, Sugil Lee, Jongeun Lee, Jong Moon Choi, Do-Wan Kwon, Seung-Kwang Hong, Kee-Won Kwon. 427-432 [doi]
• Efficient and Trusted Detection of Rootkit in IoT Devices via Offline Profiling and Online MonitoringXingbin Jiang, Michele Lora, Sudipta Chattopadhyay 0001. 433-438 [doi]
• Quantitatively Assessing the Cyber-to-Physical Risk of Industrial Cyber-Physical SystemsLingxuan Zhang, Linsen Li, Futai Zou, Jiachao Niu. 439-444 [doi]
• SERN: Modeling and Analyzing the Soft Error Reliability of Convolutional Neural NetworksLiqi Ping, Jingweijia Tan, Kaige Yan. 445-450 [doi]
• Defect-Tolerant Mapping of CMOL Circuits with Delay OptimizationXiaojing Zha, Yinshui Xia. 451-456 [doi]
• Multi-task Scheduling for PIM-based Heterogeneous Computing SystemDawen Xu 0002, Cheng Chu, Cheng Liu, Ying Wang, Xianzhong Zhou, Lei Zhang, Huaguo Liang, Huawei Li. 457-462 [doi]
• An ASIP Approach to Path Allocation in TDM NoCs using Adaptive Search RegionSeungseok Nam, Emil Matús, Gerhard P. Fettweis. 463-468 [doi]
• Analog Circuit Implementation of LIF and STDP Models for Spiking Neural NetworksZhitao Yang, Yucong Huang, Jianghan Zhu, Terry Tao Ye. 469-474 [doi]
• DA-GC: A Dynamic Adjustment Garbage Collection Method Considering Wear-leveling for SSDZhe Chen, Yuelong Zhao. 475-480 [doi]
• Accelerating RRT Motion Planning Using TCAMYuxin Yang, Shiqi Lian, Xiaoming Chen, Yinhe Han. 481-486 [doi]
• Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessorsChirag Joshi, Palash Das, Ashwini A. Kulkarni, Hemangee K. Kapoor. 487-492 [doi]
• Analog Circuit Implementation of Neurons with Multiply-Accumulate and ReLU FunctionsYucong Huang, Zhitao Yang, Jianghan Zhu, Terry Tao Ye. 493-498 [doi]
• Securing Machine Learning Architectures and SystemsShirin Haji Amin Shirazi, Hoda Naghibijouybari, Nael B. Abu-Ghazaleh. 499-506 [doi]
• Gate-Level Models for Fast Cross-Level Power Density EstimationPhilipp Schlicker, Oliver Bringmann 0001. 507-512 [doi]
• Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array TechnologyHalima Najibi, Alexandre Levisse, Marina Zapater, Mohamed M. Sabry Aly, David Atienza. 513-518 [doi]
• Cost Modeling and Analysis of TSV and Contactless 3D-ICsMinmin Jiang, Ioannis A. Papistas, Vasilis F. Pavlidis. 519-524 [doi]
• A 53%-PTE and 4-Mbps Power and Data Telemetry Circuit based on Adaptive Duty-cycling BPSK Modulated Class-E AmplifierSiyao Zhu, Jian Zhao, Yongfu Li, Mingyi Chen. 525-530 [doi]
• Privacy Threats and Protection in Machine LearningJiliang Zhang 0002, Chen Li, Jing Ye, Gang Qu. 531-536 [doi]
• Prediction Stability: A New Metric for Quantitatively Evaluating DNN OutputsQingli Guo, Jing Ye, Jiliang Zhang 0002, Yu Hu, Xiaowei Li 0001, Huawei Li. 537-542 [doi]
• On Configurable Defense against Adversarial Example AttacksBo Luo, Min Li 0019, Yu Li 0007, Qiang Xu 0001. 543-548 [doi]
• Adversarial Perturbation with ResNetHeng Liu, Linzhi Jiang, Jian Xu, Dexin Wu, Liqun Chen. 549-554 [doi]
• A Simplified Arm Processor for VLSI EducationNoah Boorstin, Veronica Cortes, Kaveh Pezeshki, David Harris, Shuojin Hang. 555-559 [doi]
• A Board and Projects for an FPGA/Microcontroller-Based Embedded Systems LabKaveh Pezeshki, Caleb Norfleet, Erik Meike, Teerapat Jenrungrot, Matthew Spencer, Joshua Brake, David M. Harris. 561-565 [doi]
• Towards Systems Education for Artificial Intelligence: A Course Practice in Intelligent Computing ArchitecturesJianlei Yang 0001, Xiaopeng Gao, Weisheng Zhao. 567-572 [doi]
• A New Silicon-aware Big Data SoC Timing Analysis Solution: A Case Study of Empyrean University ProgramHan Yu, Chao Guo, Bin Chen, Changxin Du, Xiao Yong, Senhua Fan. 573-578 [doi]