The Optimal Wire Order for Low Power CMOS

Paul Zuber, Peter Gritzmann, Michael Ritter, Walter Stechele. The Optimal Wire Order for Low Power CMOS. In Vassilis Paliouras, Johan Vounckx, Diederik Verkest, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings. Volume 3728 of Lecture Notes in Computer Science, pages 674-683, Springer, 2005. [doi]

Abstract

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