Abstract is missing.
- FPGA-Based Parallel DBSCAN ArchitectureNeil Scicluna, Christos-Savvas Bouganis. 1-12 [doi]
- FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman AlgorithmKarim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez. 13-24 [doi]
- Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable DevicesPascal Sasdrich, Tim Güneysu. 25-36 [doi]
- Accelerating Heap-Based Priority Queue in Image Coding Application Using Parallel Index-Aware Tree AccessYuhui Bai, Syed Zahid Ahmed, Bertrand Granado. 37-48 [doi]
- A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT VariationRui Policarpo Duarte, Christos-Savvas Bouganis. 49-60 [doi]
- Relocatable Hardware Threads in Run-Time Reconfigurable SystemsAlexander Wold, Andreas Agne, Jim Torresen. 61-72 [doi]
- Faster FPGA Debug: Efficiently Coupling Trace Instruments with User CircuitryEddie Hung, Jeffrey B. Goeders, Steven J. E. Wilton. 73-84 [doi]
- On the Impact of Replacing a Low-Speed Memory Bus on the Maxeler Platform, Using the FPGA's Configuration InfrastructureKarel Heyse, Dirk Stroobandt, Oliver Kadlcek, Oliver Pell. 85-96 [doi]
- Towards Dynamic Cache and Bandwidth InvasionCarsten Tradowsky, Martin Schreiber, Malte Vesper, Ivan Domladovec, Maximilian Braun, Hans-Joachim Bungartz, Jürgen Becker. 97-107 [doi]
- Stand-Alone Memory Controller for Graphics SystemTassadaq Hussain, Oscar Palomar, Osman S. Ünsal, Adrián Cristal, Eduard Ayguadé, Mateo Valero, Amna Haider. 108-120 [doi]
- Evaluating High-Level Program Invariants Using Reconfigurable HardwareJoonseok Park, Pedro C. Diniz. 121-132 [doi]
- Automated Data Flow Graph Partitioning for a Hierarchical Approach to Wordlength OptimizationEnrique Sedano, Daniel Menard, Juan A. López. 133-143 [doi]
- Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector ComputerTobias Kenter, Gavin Vaz, Christian Plessl. 144-155 [doi]
- Enhanced Radiation Tolerance of an Optically Reconfigurable Gate Array by Exploiting an Inversion/Non-inversion ImplementationTakashi Yoza, Minoru Watanabe. 156-166 [doi]
- Hardware-Accelerated Data Compression in Low-Power Wireless Sensor NetworksAndreas Engel, Andreas Koch 0001. 167-178 [doi]
- OCP2XI Bridge: An OCP to AXI Protocol BridgeZdravko Panjkov, Juergen Haas, Martin Aigner, Herbert Rosmanith, Tianlun Liu, Roland Poppenreiter, Andreas Wasserbauer, Richard Hagelauer. 179-190 [doi]
- FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation AnalysisKaoru Hamasaki, Keisuke Dohi, Yuichiro Shibata, Kiyoshi Oguri. 191-196 [doi]
- A Synthesizable Multicore Platform for Microwave ImagingPascal Schleuniger, Sven Karlsson. 197-204 [doi]
- An Efficient Implementation of the Adams-Hamilton's Demosaicing Algorithm in FPGAsJalal Khalifat, Ali Ebrahim, Tughrul Arslan. 205-212 [doi]
- FPGA Design of Delay-Based Digital Effects for Electric GuitarPablo Calleja, Gabriel Caffarena, Ana Iriarte. 213-218 [doi]
- Design Space Exploration of a Particle Filter Using Higher-Order FunctionsRinse Wester, Jan Kuper. 219-226 [doi]
- Simulation of Complex Biochemical Pathways in 3D Process Space via Heterogeneous Computing Platform: Preliminary ResultsJie Li, Amin Salighehdar, Narayan Ganesan. 227-232 [doi]
- Efficient Buffer Design and Implementation for Wormhole Routers on FPGAsTaimour Wehbe, Xiaofang Wang. 233-239 [doi]
- MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor - -Overhead Evaluation of Side-Channel Countermeasures-Christopher Pöpper, Oliver Mischke, Tim Güneysu. 240-247 [doi]
- ARABICA: A Reconfigurable Arithmetic Block for ISA CustomizationIhsen Alouani, Mazen A. R. Saghir, Smaïl Niar. 248-253 [doi]
- Built-in 3-Dimensional Hamming Multiple-Error Correcting Scheme to Mitigate Radiation Effects in SRAM-Based FPGAsB. Chagun Basha, Stanislaw J. Piestrak, Sébastien Pillement. 254-261 [doi]
- Adapting Processor Grain via ReconfigurationJecel Mattos de Assumpção Jr., Merik Voswinkel, Eduardo Marques. 262-267 [doi]
- Instruction Set Optimization for Application Specific ProcessorsMax Ferger, Michael Hübner. 268-274 [doi]
- A Dataflow Inspired Programming Paradigm for Coarse-Grained Reconfigurable ArraysAnja Niedermeier, Jan Kuper, Gerard J. M. Smit. 275-282 [doi]
- Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error DetectionSebastian Meisner, Marco Platzner. 283-290 [doi]
- Diffusion-Based Placement Algorithm for Reducing High Interconnect Demand in Congested Regions of FPGAsAli Asghar, Husain Parvez. 291-297 [doi]
- GPU vs FPGA: A Comparative Analysis for Non-standard PrecisionUmar Ibrahim Minhas, Samuel Bayliss, George A. Constantinides. 298-305 [doi]
- Instruction Extension and Generation for Adaptive ProcessorsChao Wang, Xi Li, Huizhen Zhang, Liang Shi, Xuehai Zhou. 306-311 [doi]
- DeSyRe: On-Demand Adaptive and Reconfigurable Fault-Tolerant SoCsIoannis Sourdis, Christos Strydis, A. Armato, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Sebastian Isaza, Alirad Malek, R. Mariani, S. Pagliarini, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard Rauwerda, Robert M. Seepers, Rishad Ahmed Shafik, Georgios Smaragdos, Dimitris Theodoropoulos, Stavros Tzilis, Michalis Vavouras. 312-317 [doi]
- Effective Reconfigurable Design: The FASTER ApproachDionisios N. Pnevmatikatos, Tobias Becker, Andreas Brokalakis, Georgi Nedeltchev Gaydadjiev, Wayne Luk, Kyprianos Papadimitriou, Ioannis Papaefstathiou, D. Pau, Oliver Pell, Christian Pilato, Marco D. Santambrogio, Donatella Sciuto, Dirk Stroobandt. 318-323 [doi]
- HARNESS Project: Managing Heterogeneous Computing Resources for a Cloud PlatformJosé Gabriel F. Coutinho, Oliver Pell, E. O'Neill, P. Sanders, J. McGlone, Paul Grigoras, Wayne Luk, C. Ragusa. 324-329 [doi]
- Profile-Guided Compilation of Scilab Algorithms for Multiprocessor SystemsJürgen Becker, Thomas Bruckschlögl, Oliver Oey, Timo Stripf, George Goulas, Nick Raptis, Christos Valouxis, Panayiotis Alefragis, Nikolaos S. Voros, Christos Gogos. 330-336 [doi]
- SAVE: Towards Efficient Resource Management in Heterogeneous System ArchitecturesGianluca Durelli, Marcello Coppola, Karim Djafarian, George Kornaros, A. Miele, M. Paolino, Oliver Pell, Christian Plessl, Marco D. Santambrogio, Cristiana Bolchini. 337-344 [doi]
- Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core ArchitecturesGiuseppe Massari, Edoardo Paone, Michele Scandale, Patrick Bellasi, Gianluca Palermo, Vittorio Zaccaria, Giovanni Agosta, William Fornaciari, Cristina Silvano. 345-352 [doi]