Abstract is missing.
- Computer Arithmetic - An Algorithm Engineer?s PerspectiveDavid W. Matula. 2 [doi]
- High-Performance Left-to-Right Array Multiplier DesignZhijun Huang, Milos D. Ercegovac. 4-11 [doi]
- Multiple-Precision Fixed-Point Vector Multiply-Accumulator Using Shared SegmentationDimitri Tan, Albert Danysh, Michael J. Liebelt. 12-19 [doi]
- Some Optimizations of Hardware Multiplication by Constant MatricesNicolas Boullis, Arnaud Tisserand. 20-27 [doi]
- A Less Recursive Variant of Karatsuba-Ofman Algorithm for Multiplying Operands of Size a Power of TwoSerdar S. Erdem, Çetin Kaya Koç. 28 [doi]
- Revisiting SRT Quotient Digit SelectionPeter Kornerup. 38-45 [doi]
- SRT Division Algorithms as Dynamical SystemsMark McCann, Nicholas Pippenger. 46-53 [doi]
- A New Iterative Structure for Hardware Division: The Parallel Paths AlgorithmEric Rice, Richard Hughey. 54-62 [doi]
- Prescaled Integer DivisionDavid W. Matula, Alex Fit-Florea. 63 [doi]
- Hardware Implementations of Denormalized NumbersEric M. Schwarz, Martin S. Schmookler, Son Dao Trong. 70-78 [doi]
- Representable Correcting Terms for Possibly Underflowing Floating Point OperationsSylvie Boldo, Marc Daumas. 79-86 [doi]
- High Performance Floating-Point Unit with 116 Bit Wide DividerGuenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess. 87-94 [doi]
- The Case for a Redundant Format in Floating Point ArithmeticHossam A. H. Fahmy, Michael J. Flynn. 95 [doi]
- Decimal Floating-Point: Algorism for ComputersMichael F. Cowlishaw. 104-111 [doi]
- Panel: Revisions to the IEEE 754 Standard for Floating-Point ArithmeticEric M. Schwarz. 112 [doi]
- Partially Rounded Small-Order Approximations for Accurate, Hardware-Oriented, Table-Based MethodsJean-Michel Muller. 114-121 [doi]
- An Overview of Floating-Point Support and Math Library on the Intel XScale:::TM::: ArchitectureCristina Iordache, Ping Tak Peter Tang. 122-128 [doi]
- Theorems on Efficient Argument ReductionsRen-Cang Li, Sylvie Boldo, Marc Daumas. 129-136 [doi]
- Accelerating Sine and Cosine Evaluation with Compiler AssistancePeter W. Markstein. 137 [doi]
- Worst Cases and Lattice ReductionDamien Stehlé, Vincent Lefèvre, Paul Zimmermann. 142-147 [doi]
- Isolating Critical Cases for Reciprocals Using Integer FactorizationJohn Harrison. 148-157 [doi]
- Solving Range Constraints for Binary Floating-Point InstructionsAvi Ziv, Merav Aharoni, Sigal Asaf. 158-164 [doi]
- A Parametric Error Analysis of Goldschmidt?s Division AlgorithmGuy Even, Peter-Michael Seidel, Warren E. Ferguson. 165 [doi]
- A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2m)Amir K. Daneshbeh, M. Anwarul Hasan. 174-180 [doi]
- Efficient Multiplication in GF(pk) for Elliptic Curve CryptographyJean-Claude Bajard, Laurent Imbert, Christophe Nègre, Thomas Plantard. 181-187 [doi]
- Low Complexity Sequential Normal Basis Multipliers over GF(2m)Arash Reyhani-Masoleh, M. Anwarul Hasan. 188-195 [doi]
- A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2m) Using an Optimal Normal Basis of Type IISoonhak Kwon. 196 [doi]
- High-Radix Iterative Algorithm for Powering ComputationJosé-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera. 204-211 [doi]
- On-Line Multiplication in Real and Complex BaseChristiane Frougny, Athasit Surarerks. 212-219 [doi]
- A VLSI Algorithm for Modular Multiplication/DivisionMarcelo E. Kaihara, Naofumi Takagi. 220-227 [doi]
- Saturating Counters: Application and Design AlternativesIsrael Koren, Yaron Koren, Bejoy G. Oomman. 228 [doi]
- Error-Free Arithmetic for Discrete Wavelet Transforms Using Algebraic IntegersK. A. Wahid, Vassil S. Dimitrov, Graham A. Jullien. 238-244 [doi]
- On Computing Addition Related Arithmetic Operations via Controlled Transport of ChargeSorin Cotofana, Casper Lageweg, Stamatis Vassiliadis. 245-252 [doi]
- The Interval Logarithmic Number SystemMark G. Arnold, Jesus Garcia, Michael J. Schulte. 253-261 [doi]
- Scaling an RNS Number Using the Core FunctionNeil Burgess. 262 [doi]
- Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI AddersVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy. 272-279 [doi]
- Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-OffsVojin G. Oklobdzija, Ram Krishnamurthy. 280 [doi]