Table of Contents

• New redundant representations of complex numbers and vectorsJean Duprat, Yvan Herreros, Sylvanus Kla. 2-9 [doi]
• Analysis of arithmetic algorithms: a statistical studyFrançoise Chaitin-Chatelin, Valérie Frayssé. 10-16 [doi]
• Representation of numbers in nonclassical numeration systemsChristiane Frougny. 17-21 [doi]
• Semantics for exact floating point operationsGerd Bohlender, Wolfgang Walter, Peter Kornerup, David W. Matula. 22-26 [doi]
• Shallow multiplication circuitsMichael S. Paterson, Uri Zwick. 28-34 [doi]
• A radix-4 modular multiplication hardware algorithm efficient for iterative modular multiplicationsNaofumi Takagi. 35-42 [doi]
• High-speed multiplier design using multi-input counter and compressor circuitsMayur Mehta, Vijay Parmar, Earl E. Swartzlander Jr.. 43-50 [doi]
• E modulo NHolger Orup, Peter Kornerup. 51-56 [doi]
• Arithmetic for digital neural networksDapeng Zhang, Graham A. Jullien, William C. Miller, Earl E. Swartzlander Jr.. 58-63 [doi]
• Exact accumulation of floating-point numbersMichael Müller, Christine Rüb, Wolfgang Rülling. 64-69 [doi]
• Fast hardware units for the computation of accurate dot productsAndreas Knofel. 70-74 [doi]
• A general division algorithm for residue number systemsJen-Shiun Chiang, Mi Lu. 76-83 [doi]
• New approach to integer division in residue number systemsDragan Gamberger. 84-91 [doi]
• Small moduli replications in the MRRNSNeil M. Wigley, Graham A. Jullien, Daniel Reaume, William C. Miller. 92-99 [doi]
• Design of residue generators and multioperand modular adders using carry-save addersStanislaw J. Piestrak. 100-107 [doi]
• Overflow/underflow-free floating-point number representations with self-delimiting variable-length exponent fieldHidetoshi Yokoo. 110-117 [doi]
• Implementation and analysis of extended SLI operationsPeter R. Turner. 118-126 [doi]
• Specifications for a variable-precision arithmetic coprocessorThomas E. Hull, Marty S. Cohen, C. B. Hall. 127-131 [doi]
• Algorithms for arbitrary precision floating point arithmeticDouglas M. Priest. 132-143 [doi]
• Designing optimum carry-skip addersVitit Kantabutra. 146-153 [doi]
• Delay optimization of carry-skip adders and block carry-lookahead addersPak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija. 154-164 [doi]
• The redundant cell adderThomas Lynch, Earl E. Swartzlander Jr.. 165-170 [doi]
• Optimal purely systolic additionLars Kühnel. 172-179 [doi]
• Constant time arbitrary length synchronous binary countersJean Vuillemin. 180-183 [doi]
• Integer division using reciprocalsRobert Alverson. 186-190 [doi]
• Fast division using accurate quotient approximations to reduce the number of iterationsDerek C. Wong, Michael J. Flynn. 191-201 [doi]
• Simple radix 2 division and square root with skipping of some addition stepsPaolo Montuschi, Luigi Ciminiera. 202-209 [doi]
• A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stagesTed E. Williams, Mark A. Horowitz. 210-217 [doi]
• A redundant binary Euclidean GCD algorithmShrikant N. Parikh, David W. Matula. 220-225 [doi]
• OCAPI: architecture of a VLSI coprocessor for the GCD and the extended GCD of large numbersAlain Guyot. 226-231 [doi]
• Table-lookup algorithms for elementary functions and their error analysisPing Tak Peter Tang. 232-236 [doi]
• Accurate and monotone approximations of some transcendental functionsWarren E. Ferguson, Tom Brightman. 237-244 [doi]
• Application of on-line arithmetic algorithms to the SVD computation: preliminary resultsPaul K.-G. Tu, Milos D. Ercegovac. 246-255 [doi]
• The CORDIC Householder algorithmShen-Fu Hsiao, Jean-Marc Delosme. 256-263 [doi]
• SVD by constant-factor-redundant-CORDICJeong-A. Lee, Tomás Lang. 264-271 [doi]
• Design and implementation of a floating-point quasi-systolic general purpose CORDIC rotator for high-rate parallel data and signal processingAlfons A. J. de Lange, Ed F. Deprettere. 272-281 [doi]