Abstract is missing.
- Work-in-Progress: Reliability Evaluation of Power SCADA System with Three-Layer IDSYenan Chen, Linsen Li, Zhaoqian Zhu, Yue Wu. 1-2 [doi]
- Work-in-Progress: MLGOPerf: An ML Guided Inliner to Optimize PerformanceAmir H. Ashouri, Mostafa Elhoushi, Yuzhe Hua, Xiang Wang, Muhammad Asif Manzoor, Bryan Chan, Yaoqing Gao. 3-4 [doi]
- Work in Progress: ACAC: An Adaptive Congestion-aware Approximate Communication Mechanism for Network-on-Chip SystemsShize Zhou, Yongqi Xue, Siyue Li, Jinlun Ji, Tong Cheng, Li Li, Yuxiang Fu. 5-6 [doi]
- Work-in-Progress: ExpCache: Online-Learning based Cache Replacement Policy for Non-Volatile MemoryJinfeng Yang, Bingzhe Li, Jianjun Yuan, Zhaoyan Shen, Hung-Chang Du, David J. Lilja. 7-8 [doi]
- On Evaluation of On-chip Thermal Covert Channel AttacksJiachen Wang, Xiaohang Wang 0001, Yingtao Jiang, Amit Kumar Singh 0002, Letian Huang, Mei Yang. 9-10 [doi]
- Work-in-Progress: High-Precision Short-Term Lifetime Prediction in TLC 3D NAND Flash Memory as Hot-data StorageXiaotong Fang, Meng Zhang 0014, Yifan Guo, Fei Chen, Binglu Chen, Xuepeng Zhan, Jixuan Wu, Fei Wu 0005, Jiezhi Chen. 11-12 [doi]
- Work-in-Progress: Prediction-based Fine-Grained LDPC Reading to Enhance High-Density Flash Read PerformanceYajuan Du, Yuan Gao, Qiao Li. 13-14 [doi]
- Work-in-Progress: Object Detection Acceleration Method by Improving Execution Efficiency of AI DeviceYoshikazu Watanabe, Yuki Kobayashi, Noboru Nakajima, Takashi Takenaka, Hiroyoshi Miyano. 15-16 [doi]
- Work-in-Progress: Toward a Robust, Reconfigurable Hardware Accelerator for Tree-Based Genetic ProgrammingChristopher Crary, Wesley Piard, Britton Chesley, Greg Stitt. 17-18 [doi]
- Work-in-Progress: Towards a Smaller than Grain Stream Cipher: Optimized FPGA Implementations of Fruit-80Gangqiang Yang, Zhengyuan Shi, Cheng Chen, Hailiang Xiong, Honggang Hu, Zhiguo Wan, Keke Gai, Meikang Qiu. 19-20 [doi]
- Work-in-Progress: CAMiSE: Content Addressable Memory-integrated Searchable EncryptionArnab Bag, Sikhar Patranabis, Debdeep Mukhopadhyay. 21-22 [doi]
- Work-in-Progress: Smart data reduction in SLAM methods for embedded systemsQuentin Picard, Stéphane Chevobbe, Mehdi Darouich, Zoe Mandelli, Mathieu Carrier, Jean-Yves Didier. 23-24 [doi]
- Work-in-Progress: An Open-Source Platform for Design and Programming of Partially Reconfigurable Heterogeneous SoCsBiruk B. Seyoum, Davide Giri, Kuan-Lin Chiu, Luca P. Carloni. 25-26 [doi]
- Work-in-Progress: Ultra-fast yet Accurate Performance Prediction for Deep Neural Network AcceleratorsKonstantin Lübeck, Alexander Louis-Ferdinand Jung, Felix Wedlich, Oliver Bringmann 0001. 27-28 [doi]
- Work-in-Progress: Cooperative MLP-Mixer Networks Inference On Heterogeneous Edge Devices through Partition and FusionYiming Li, Shouzhen Gu, Mingsong Chen. 29-30 [doi]
- Work-in-Progress: RISC-V Based Low-cost Embedded Trace Processing SystemXiao Hu, Yaohua Wang, Xuan Gao. 31-32 [doi]
- Work-in-Progress: Efficient Low-latency Near-Memory AdditionAlexander Reaugh, Sayed Ahmad Salehi. 33-34 [doi]
- Work-in-Progress: NoRF: A Case Against Register File Operands in Tightly-Coupled AcceleratorsDavid J. Schlais, Heng Zhuo, Mikko H. Lipasti. 33-34 [doi]
- Work-in-Progress: SuperNAS: Fast Multi-Objective SuperNet Architecture Search for Semantic SegmentationMarihan Amein, Zhuoran Xiong, Olivier Therrien, Brett H. Meyer, Warren J. Gross. 35-36 [doi]
- Work-in-Progress: A Processing-in-Pixel Accelerator based on Multi-level HfOx ReRAMMinhaz Abedin, Arman Roohi, Nathaniel C. Cady, Shaahin Angizi. 37-38 [doi]
- Work in Progress: Emulation of biological tissues on an FPGAJerry Jacob, Sucheta Sehgal, Nitish D. Patel. 39-40 [doi]
- Work-in-Progress: DRAM-MaUT: DRAM Address Mapping Unveiling Tool for ARM DevicesAnandpreet Kaur, Pravin Srivastav, Bibhas Ghoshal. 41-42 [doi]