Closing the Gap between FPGA and ASIC - Balancing Flexibility and Efficiency - researchr publication bibtex

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Hadi Parandeh-Afshar. Closing the Gap between FPGA and ASIC - Balancing Flexibility and Efficiency. PhD thesis, EPFL, Switzerland, 2012. [doi]

@phdthesis{ch-300,
  title = {Closing the Gap between FPGA and ASIC - Balancing Flexibility and Efficiency},
  author = {Hadi Parandeh-Afshar},
  year = {2012},
  url = {https://infoscience.epfl.ch/record/175046},
  researchr = {https://researchr.org/publication/ch-300},
  cites = {0},
  citedby = {0},
  school = {EPFL, Switzerland},
}

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