Table of Contents

• Code generation alternatives to reduce heterogeneous embedded systems to homogeneityFranco Fummi, Michele Lora, Francesco Stefanni, Sara Vinco. 1-4 [doi]
• Modeling communication and circuit's behaviorTom J. Kazmierski, Torsten Maehne. 1 [doi]
• Systemc transaction level modeling with transaction eventsBastian Haetzer, Martin Radetzki. 1-6 [doi]
• Rapid virtual prototyping of real-time systems using predictable platform characterizationsSeyed Hosein Attarzadeh Niaki, Marcus Mikulcak, Ingo Sander. 1-8 [doi]
• Systemc infrastructure and extensionsPeter Flake, Frank Oppenheimer. 1 [doi]
• Design space exploration for cyber physical system design using constraint solvingBenny Hockner, Petra Hofstedt, Sascha Kaltschmidt, Peter Sauer, Thilo Vörtler. 1-4 [doi]
• Graph-based approach for software allocation in automotive networked embedded systems: A partition-and-map algorithmYasser Shoukry, Ajay Kumar, M. Watheq El-Kharashi, Gahda Bahig, Sherif Hammad. 1-6 [doi]
• Performance analysis method for RT systems: Promartes for autonomous robotKonstantinos Triantafyllidis, Egor Bondarev, Peter H. N. de With. 1-8 [doi]
• SystemVerilog: The new standardKaiming Ho. 1 [doi]
• Application of formal methods for design space exploration and refinementDominique Borrione, Ashraf M. Salem. 1 [doi]
• Why SystemVeriog?Peter Flake. 1-6 [doi]
• Representing mapping and scheduling decisions within dataflow graphsChristian Zebelein, Christian Haubelt, Joachim Falk, Tobias Schwarzer, Jürgen Teich. 1-8 [doi]
• Model driven engineering at workGjalt De Jong, Julio L. Medina. 1 [doi]
• Simulation analysis and validationFrank Oppenheimer, Martin Radetzki. 1 [doi]
• Platform based designJean-Philippe Babau, Martin Radetzki. 1 [doi]
• Modeling languages extensions and best practicesJulio L. Medina, Gjalt De Jong. 1 [doi]
• If SystemVerilog is so good, why do we need the UVM? Sharing responsibilities between libraries and the core languageJonathan Bromley. 1-7 [doi]
• A new assertion property language for analog/mixed-signal circuitsDhanashree Kulkarni, Andrew N. Fisher, Chris J. Myers. 1-8 [doi]
• Fine-grain adaptation for real time embedded systems using UML/MARTE profileMouna Ben Said, Yessine Hadj Kacem, Nader Ben Amor, Mickaël Kerboeuf, Mohamed Abid. 1-8 [doi]
• A formal verification framework for Bluespec System VerilogSamir Ouchani, Otmane Aït Mohamed, Mourad Debbabi. 1-7 [doi]
• A function approach for simple wireless sensor node energy consumption modelingAndriamampianina Aina Randrianarisaina, Olivier Pasquier, Pascal Chargé. 1-8 [doi]
• A novel approach for assertion based verification of DDR memory protocolsMoustafa Kassem, Marianne Michel, Mohamed AbdElSalam, Ashraf Salem. 1-4 [doi]
• Advanced features for industry-level logging and tracing of C-based designsWei Hong, Jyoti Joshi, Alexander Viehl, Nico Bannow, Angela Kramer, Hendrik Post, Oliver Bringmann, Wolfgang Rosenstiel. 1-6 [doi]
• How to survive the verification of the latest generation of automotive system on chipArnaud Laroche, Jérôme Kirscher. 1-7 [doi]
• Bridging algorithm and ESL design: Matlab/Simulink model transformation and validationLiyuan Zhang, Michael Glaß, Nils Ballmann, Jürgen Teich. 1-8 [doi]
• Event-driven (RN) modeling for AMS circuitsSerge Garcia Sabiro. 1-8 [doi]
• Split of composite components for distributed applicationsAnsgar Radermacher, Arnaud Cuccuru, Sebastien Gerard, Brahim Hamid. 1-6 [doi]
• Assisting refinement in System-on-Chip designHocine Mokrani, Rabéa Ameur-Boulifa, Emmanuelle Encrenaz-Tiphène. 1-6 [doi]
• Combining analytical and simulation-based design space exploration for time-critical systemsFernando Herrera, Ingo Sander. 1-8 [doi]
• Model-driven design for the development of multi-platform smartphone applicationsG. Botturi, Emad Samuel Malki Ebeid, Franco Fummi, Davide Quaglia. 1-8 [doi]
• Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC modelsAnirudh Kaushik, Hiren D. Patel. 1-8 [doi]
• Model generation for embedded analog/mixed-signal systemsJan Haase, François Pêcheux. 1 [doi]
• Modeling the analog circuit design feature varietyCristian Ferent, Alex Doboli. 1-7 [doi]
• Optimal component selection for energy-efficient systemsMatthias Sauppe, Thomas Horn, Erik Markert, Ulrich Heinkel, Hans-Werner Sahm, Klaus-Holger Otto. 1-8 [doi]
• Modeling of signal integrity in bus communications with timed data flow SystemC-AMSRuomin Wang, Julien Denoulet, Sylvain Feruglio, Farouk Vallette, Patrick Garda. 1-6 [doi]
• Multi-paradigm semantics for simulating SysML models using SystemC-AMSDaniel Chaves Cafe, Filipe Vinci dos Santos, Cécile Hardebolle, Christophe Jacquet, Frédéric Boulanger. 1-8 [doi]
• Hybrid dynamical systems for memristor modelling an approach avoiding the terminal-state problemJoachim Haase, André Lange. 1-6 [doi]
• Verification of heterogeneous systems: Theory and industrial experiencesChristoph Grimm, Emmanuelle Encrenaz. 1 [doi]
• The unique challenges of debugging design and verification code jointly in SystemVerilogDave Rich. 1-7 [doi]
• Fine grained adaptive simulation with application to NoCsMarcus Eggenberger, Martin Radetzki. 1-8 [doi]
• Integrating circuit analyses for assertion-based verification of programmable AMS circuitsDogan Ulus, Alper Sen 0001, I. Faik Baskaya. 1-8 [doi]