Table of Contents

• Event-Driven Spatiotemporal Processing-In-Sensor with Phase Change Memory-based Optical AccelerationMehrdad Morsali, Deniz Najafi, Amin Shafiee, Sepehr Tabrizchi, Pietro Mercati, Mohsen Imani, Arman Roohi, Navid Khoshavi, Mahdi Nikdast, Shaahin Angizi. 1-7 [doi]
• A 22nm 96.83-TOPS/W Time-Domain Compute-in-Memory Engine Utilizing Mixed-Fidelity for Edge-AI ApplicationsJie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke. 8-13 [doi]
• IO-Optimized Design-Time Configurable Negacyclic Seven-Step NTT Architecture for FHE ApplicationsEmre Koçer, Selim Kirbiyik, Tolun Tosun, Ersin Alaybeyoglu, Erkay Savas. 14-21 [doi]
• ADDR: Architecture Design and Model Deployment Optimization for Hybrid SRAM-ROM Compute-in-MemoryTeng Wan, Yiming Chen, Zekai Chen, Yongpan Liu, Huazhong Yang, Xueqing Li 0002. 22-28 [doi]
• Fast, Transparent and Accurate Simulation of Thousand Processing-in-Memory CoresZhichao Lv, Tianjun Bu, Qiusong Yang. 29-34 [doi]
• Reducing T-Depth and T-Count in Quantum Multiplication Using Compressor PrimitivesSiyi Wang, Suman Dutta, Wei Jie Bryan Lee, Jerrie Feng, Xiang Fang, Anupam Chattopadhyay. 35-40 [doi]
• Security Challenges Toward In-Sensor Computing SystemsMashrafi Alam Kajol, Nishanth Goud Chennagouni, Wei Lu, Qiaoyan Yu. 41-48 [doi]
• Sliding-Window Scheduling to Exploit Hybrid-Bonding-Based Accelerators for Fully Homomorphic EncryptionYi Sun, Xinhua Chen, Xinglong Yu, Wenxuan Zhang, Yifan Zhao 0007, Honglin Kuang, Jun Han 0003. 49-55 [doi]
• An Efficient Distributed Machine Learning Inference Framework with Byzantine Fault DetectionXuan Zhou, Utkarsh Mohan, Yao Liu, Peter A. Beerel. 56-63 [doi]
• MILS: Modality Interaction Driven Learning for Logic SynthesisMingyu Zhao, Jiawei Liu 0006, Jianwang Zhai, Chuan Shi 0001. 64-70 [doi]
• Titanus: Enabling KV Cache Pruning and Quantization On-the-Fly for LLM AccelerationPeilin Chen, Xiaoxuan Yang. 71-77 [doi]
• Aphelios: A Selective Lock-step Neural Processing Unit DesignWenhao Sun, Yiming Gan, Yuhui Hao, Yinhe Han 0001. 78-84 [doi]
• Unlocking High-Performance Low-Power Adiabatic Logic Computing with Modern FinFET Technology NodeJun Yin, Mircea Stan. 85-90 [doi]
• HyperEncoding: Spiking Neural Networks with Hyperdimensional Encoding for Robust Edge IntelligenceAlaaddin Goktug Ayar, Anthony Maida, Martin Margala. 91-96 [doi]
• DPQ-HD: Post-Training Compression for Ultra-Low Power Hyperdimensional ComputingNilesh Prasad Pandey, Shriniwas Kulkarni, David Wang, Onat Güngör, Flavio Ponzina, Tajana Rosing. 97-104 [doi]
• An Optimal DFF-Oriented Technology Legalization Algorithm for Rapid Single-Flux-Quantum CircuitsMinglei Zhou, Rongliang Fu, Ran Zhang, Xiaochun Ye, Tsung-Yi Ho, Junying Huang. 105-111 [doi]
• GPU-Accelerated Simulated Oscillator Ising/Potts Machine Solving Combinatorial Optimization ProblemsYilmaz Ege Gonul, Ceyhun Efe Kayan, Ilknur Mustafazade, Nagarajan Kandasamy, Baris Taskin. 112-117 [doi]
• SOFTONIC: A Photonic Design Approach to Softmax Activation for High-Speed Fully Analog AI AccelerationPriyabrata Dash, Anxiao Jiang, Dharanidhar Dang. 118-125 [doi]
• Optimizing Reliability and Energy Efficiency in Heterogeneous Multicore Systems: A Novel Task Deployment StrategyYu-Guang Chen, Yin-Rong Zhuo, Zheng-Wei Chen, Ing-Chao Lin. 126-133 [doi]
• EdgeGuard: Robust and Fault-Aware Design for Resilient Edge Computing AI AcceleratorsSabrina Ahmed, Khaza Anuarul Hoque, Benjamin Carrion Schafer. 134-140 [doi]
• EPQUIC: Efficient Post-Quantum Cryptography for QUIC-Enabled Secure CommunicationBen Dong, Qian Wang. 141-146 [doi]
• Modeling, Design and In-situ Demonstration of Bio-inspired Central Pattern Generator and Neuromorphic Computing Circuits for Complex Kinematic Control of Quadruped RobotsQiankai Cao, Yuhao Ju, Zhiwei Zhong, Zhengyu Chen 0002, Jie Gu 0001. 147-154 [doi]
• Impact of Error Rate Misreporting on Resource Allocation in Multi-tenant Quantum Computing and DefenseSubrata Das, Swaroop Ghosh. 155-160 [doi]
• Microarchitecture Evaluation Framework for Transient Execution Attack Vulnerability: Metrics, Fuzzing, and Sensitivity AnalysisJordan McGhee, Nayra Lujano, Aiden Peterson, Henry Duwe, Akhilesh Tyagi, Berk Gülmezoglu. 161-168 [doi]
• A Reconfigurable and Accurate Circuit-Level Substrate for DRAM Design and AnalysisS. M. Mojahidul Ahsan, Mohammad Nouri, Ramesh Reddy Ganapam, Mohammad Alian, Tamzidul Hoque. 169-176 [doi]
• CarbonSet: A Dataset to Analyze Trends and Benchmark the Sustainability of CPUs and GPUsJiajun Hu, Chetan Choppali Sudarshan, Maxwell Clifford, Vidya A. Chhabria, Aman Arora 0001. 177-184 [doi]
• A 1.27 fJ/B/transition Digital Compute-in-Memory Architecture for Non-Deterministic Finite Automata EvaluationChristian Lanius, Florian Freye, Tobias Gemmeke. 185-191 [doi]
• MAPLE: Flexible-Precision Processing-In-Memory Architecture for Efficient On-Device MLJaewon Park, Quang Anh Hoang, Jonathan Ta, Shinhaeng Kang, Kyomin Sohn, Sang-Woo Jun. 192-199 [doi]
• CADOSys: Cache Aware Design Space Optimization for Spatial ML AcceleratorsRuihao Li 0002, Siyuan Ma, Krishna Kavi, Gayatri Mehta, Neeraja J. Yadwadkar, Lizy K. John. 200-207 [doi]
• A Placement Optimization Framework for Non-Integer Multiple-Height CellsGuohao Chen 0001, Jiaming Chang, Xingyu Tong 0001, Peng Zou, Jianli Chen. 208-214 [doi]
• Alchemy : A Methodology for Scalable RTL Design Space ExplorationRyan Swann, James E. Stine. 215-220 [doi]
• A Machine Learning-Assisted Placement Flow with Pin Accessibility AwarenessMin-Feng Hsieh, Ting-Chi Wang. 221-226 [doi]
• Towards Memory-Efficient and Sustainable Machine Unlearning on Edge using Zeroth-Order OptimizerCi Zhang, Chence Yang, Qitao Tan, Jun Liu, Ao Li, Yanzhi Wang, Jin Lu, Jinhui Wang, Geng Yuan. 227-232 [doi]
• An Exploration of a Heterogeneous Neural Configuration of SNNsGeorge Evans, Karan P. Patel, Catherine D. Schuman, Garrett S. Rose, Srutarshi Banerjee, Hritom Das. 233-237 [doi]
• Low-Cost Wearable Edge-AI Device for Diabetes ManagementLuke Young, Danling Wang, Na Gong. 238-244 [doi]
• Carbon Efficiency of Natural Organic Honey-Memristor Based Neuromorphic ComputingHarshvardhan Uppaluru, Zoe Templin, Shah Zayed Riam, Feng Zhao, Jinhui Wang. 245-251 [doi]
• Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum ServicesChao Lu, Esha Telang, Aydin Aysu, Kanad Basu. 252-257 [doi]
• Don't Cares in Quantum Circuits: A Security PerspectiveDonald Lushi, Christian Rasmussen, Samah Mohamed Ahmed Saeed. 258-264 [doi]
• CHEQ: Towards Enabling Circuit Integrity Checking in Quantum ControllersBarbora Hrdá, Sanjay Deshpande, Theodoros Trochatos, Jakub Szefer. 265-272 [doi]
• Inverse-Transpilation: Reverse-Engineering Quantum Compiler Optimization Passes from Circuit SnapshotsSatwik Kundu, Swaroop Ghosh. 273-277 [doi]
• Concurrency-Aware Cache Miss Cost Prediction with Perceptron LearningYuping Wu, Xiaoyang Lu, Xiaoming Chen 0003, Yinhe Han 0001, Xian-He Sun. 278-283 [doi]
• Learning-Enabled Denial-of-Service (DoS) Attack Detection and Mitigation for Chiplet-Based Hybrid Interconnection NetworkMd. Tareq Mahmud, Ke Wang. 284-291 [doi]
• ASF-CRB: an Energy-Efficient Activity-Balanced Charge-Recycling Bus Architecture Based on Alternate Signal FlippingXiangyu Ran, Chuxiong Lin, Jieyu Li, Weifeng He. 292-297 [doi]
• A Lifetime Extension Framework for Communication-Intensive Systems Based on Wavelength-Routed Optical Networks-on-ChipZhidan Zheng, Liaoyuan Cheng, Jeng-De Chang, Tsun-Ming Tseng, Ing-Chao Lin, Ulf Schlichtmann. 298-305 [doi]
• SFC-TRNG: A Stable Fast and Compact True Random Number Generator based on Magnetic Tunnel JunctionYu Ma, Yan Sun, Jianmin Zhang, Siqing Fu. 306-311 [doi]
• PixelPrune: Optimizing AIoT Vision Systems via In-Sensor Segmentation and Adaptive Data TransferMohammadreza Mohammadi, Mehrdad Morsali, Sepehr Tabrizchi, Brendan Reidy, Arman Roohi, Shaahin Angizi, Ramtin Zand. 312-319 [doi]
• Systolic Arrays and Structured Pruning Co-design for Efficient Transformers in Edge SystemsPedro Palacios, Rafael Medina 0001, Jean-Luc Rouas, Giovanni Ansaloni 0002, David Atienza. 320-327 [doi]
• Energy-Efficient Scheduling for Cattle Collars An Optimized Approach Based on Analytic Hierarchy Process and Preemption ThresholdPengpeng Sun, Hanchen Wang, Yelan Xing, Bingze Chen, Xinrong Kou, Hongming Zhang, Pujing Zhang. 328-333 [doi]
• CrossNAS: A Cross-Layer Neural Architecture Search Framework for PIM SystemsMd Hasibul Amin, Mohammadreza Mohammadi, Jason D. Bakos, Ramtin Zand. 334-340 [doi]
• FP-SMR: A Fully Digital Floating-Point Processing-in-SAS-MRAM for Session-based Recommender SystemAsmer Hamid Ali, Amitesh Sridharan, Cheng Guo, William Hwang, Wilman Tsai, Jeff Zhang, Yiran Chen 0001, Shan X. Wang, Deliang Fan. 341-347 [doi]
• MirrorFS: Cross-Layered File System for SSD-based In-Storage ComputingJin Xue, Yuhong Song, Yang Guo, Zili Shao. 348-353 [doi]
• Forensics of Transpiled Quantum CircuitsRupshali Roy, Archisman Ghosh, Swaroop Ghosh. 354-359 [doi]
• An Effective and Efficient Qubit Mapping Approach for Trapped-Ion Quantum ComputersLiang-Yu Lai, Ting-Chi Wang. 360-365 [doi]
• PruningQC: Boosting the Quantum Computation Fidelity by Pruning Redundant GatesFang Qi, Yongshan Ding, Victor Bankston, Ji Liu, Lu Peng 0001. 366-371 [doi]
• ParallelNTT: Maximizing Performance of Forward and Inverse NTT on FPGA for ML-DSA and ML-KEMBardia Taghavi, Reza Azarderakhsh, Mehran Mozaffari Kermani. 372-378 [doi]
• Ultra-Compact and High-Throughput True Random Number Generator for FPGAsGabriel Cojocaru, Vincent Immler. 379-384 [doi]
• Single-Pass Symbolic Learning for Real-Time Embedded SecurityAlaaddin Goktug Ayar, Sercan Aygun, Martin Margala. 385-390 [doi]
• SAFE-SiP: Secure Authentication Framework for System-in-Package Using Multi-party ComputationIshraq Tashdid, Tasnuva Farheen, Sazadur Rahman. 391-396 [doi]
• Invisible Leaks: Covert Channel Exploitation in In-Sensor Computing SystemMashrafi Alam Kajol, Md Abdullah Al Rumon, Shehjar Sadhu, Suparna Veeturi, Dharma Rane, Dhaval Solanki, Kunal Mankodiya, Wei Lu, Qiaoyan Yu. 397-398 [doi]
• Enhancing Parallelism in Commercial PIM DRAM with LUT-Based DesignPrapti Panigrahi, Rudra Biswas, Alexandar Devic, Vijaykrishnan Narayanan. 399-400 [doi]
• DINGO - A Distributed & Intelligent Graph Based Memory for IoTSarah Glatter, Prabuddha Chakraborty. 401-402 [doi]
• ParaHDC: Leveraging GPU Acceleration for Scalable Hyperdimensional LearningAbu Kaisar Mohammad Masum, Sercan Aygun. 403-404 [doi]
• LEGO: A 12nm FinFET Analog Cell Library for Analog/Mixed-Signal ApplicationsXindi Liu, Chien-Jian Tseng, Richard Shi. 405-406 [doi]
• Improving the Quality of the High-Level Synthesis Estimation Results through Multi-Level Predictive ModelsVictoria Gammenthaler, Benjamin Carrion Schafer. 407-412 [doi]
• Clock-Wirelength-Driven Detailed PlacementZiang Ge, Yikai Liu, Jindong Zhou, Pingqiang Zhou. 413-419 [doi]
• Learning Cache Coherence Traffic for NoC Routing DesignGuochu Xiong, Xiangzhong Luo, Weichen Liu. 420-426 [doi]
• HWFixBench: Benchmarking Tools for Hardware Understanding and Fault RepairWeimin Fu, Shijie Li, Yier Jin, Xiaolong Guo. 427-434 [doi]
• DiffDock-FPGA: A Hardware Accelerator for Molecular Docking with Customized Tensor Product Framework and Sparse-Aware Access StrategyChuanzhao Zhang, Rui Liu, Shidi Tang, Shun Li, Ming Ling. 435-441 [doi]
• ART: Customizing Accelerators for DNN-Enabled Real-Time Safety-Critical SystemsShixin Ji, Xingzhen Chen, Jinming Zhuang, Wei Zhang 0062, Zhuoping Yang, Sarah Schultz, Yukai Song, Jingtong Hu, Alex K. Jones, Zheng Dong, Peipei Zhou 0001. 442-449 [doi]
• VLSUMaP: A High-Performance Matrix Processor with Virtually Expanded LSU Boosting HBM Bandwidth UtilizationXin Yang, Xinjie Kong, Kaixuan Wang, Xin Fan, Zikang Zhou, Zhuoyuan Yang, Zengshi Wang, Jun Han 0003. 450-456 [doi]
• HCSAs: Hybrid Computing Systolic Arrays for Accelerating Mamba Models with Unified State Space Buffers and Energy-Efficient DataflowXu Jin, Haotian Zheng, Maohua Nie, Jialin Wang, Chuanjin Richard Shi. 457-462 [doi]
• Flip-Break: Breaking Flip-flop-based Logic Locking in Sequential CircuitsArmin Darjani, Nima Kavand, Akash Kumar 0001. 463-469 [doi]
• Security Aware Placement for Split Manufactured Integrated Circuit Design FlowsArjun Suresh, Hari Narayana Burra, Wei-Huan Chen, Daniel E. Holcomb. 470-477 [doi]
• Avoiding Malicious Nodes of a 3-D NoC with Security-Aware Priority-Based RoutingAlec Aversa, Hasin Ishraq Reefat, Naghmeh Karimi, Ioannis Savidis. 478-485 [doi]
• RandEye: On-Sensor Stochastic Image Transformation for Backdoor-Resistant Edge InferenceWantong Li, Liuwan Zhu. 486-491 [doi]
• AI-Driven Microelectronics Education Using Digital Twins and Extended RealityRuoshan Lan, Ehsan Azimi. 492-497 [doi]
• Compression-Assisted Zero-Shot Prompting of Large Language Models (LLMs) for Educational Skill Classification of Microprocessor CurriculaPaul Amoruso, Ronald F. DeMara. 498-502 [doi]
• PeerCollate: A Peer-Centered Team Learning Approach to Digitized STEM Lab Activities and AssessmentsMousam Hossain, Adrian Tatulian. 503-507 [doi]
• Integrating Generative AI into Microelectronics Education: Implications for Learning and Pedagogical PracticeMike Borowczak, Andrea C. Borowczak. 508-515 [doi]
• NAND Flash Memory Scaling and Process Technology ModelingMark Kraman, Matt Zhu, Yan Li. 516-521 [doi]
• System-Level Validation Across Multiple Platforms to build a Robust 2.5D Multi Foundry Chiplet SolutionSrivatsa Rangachar Srinivasa, Dileep Kurian, Paolo A. Aseron, Prerna Budhkar, Vinayak Honkote, Dan Lake, Jaykant Timbadiya, Satish Yada, Suresh Kadavakollu, James Greensky, Gauthaman Murali, Anuradha Srinivasan, Ragh Kuttappa, Tanay Karnik. 522-526 [doi]
• An Industrial Perspective on ML-Macro Placement Methods: Challenges and RecommendationsSivaramakrishnan Harihara Subramanian, Khris M. Valencia Chacon, Venkatesh R. S. 527-533 [doi]
• How Vulnerable are Large Language Models (LLMs) against Adversarial Bit-Flip Attacks?Abeer Matar A Almalky, Ranyang Zhou, Shaahin Angizi, Adnan Siraj Rakin. 534-539 [doi]
• 3D-PLANE: A 3D-stacked DRAM-based Programmable SLM Accelerator Capable of Near-Memory and Energy-Efficient Parallel ProcessingSathwika Bavikadi, Purab Ranjan Sutradhar, Jayanth Thangellamudi, Sai Manoj Pudukotai Dinakarrao. 540-546 [doi]
• PREFACE - A Reinforcement Learning Framework for Code Verification via LLM Prompt RepairManvi Jha, Lily Jiaxin Wan, Huan Zhang, Deming Chen. 547-553 [doi]
• On Jailbreaking Quantized Language Models Through Fault Injection AttacksNoureldin Zahran, Ahmad Tahmasivand, Ihsen Alouani, Khaled N. Khasawneh, Mohammed E. Fouda. 554-561 [doi]
• The State of Simulation Frameworks for Evaluating Emerging LLM AcceleratorsStefan Maczynski, Amlan Ganguly, Mark A. Indovina. 562-567 [doi]
• ReX-HD: A Deterministic ReRAM-Based Hyperdimensional Computing Framework for Edge ComputingSabrina Hassan Moon, Ahmed Ahmed 0006, Abu Kaisar Mohammad Masum, Sercan Aygun, Dayane Reis. 568-574 [doi]
• Quantum Image Processing: A Comparative Study of NEQR and FRQI Encoding Schemes with Hybrid ProcessingAbu Kaisar Mohammad Masum, Mehran Shoushtari Moghadam, Lida Kouhalvandi, M. Hassan Najafi, Sercan Aygun. 575-580 [doi]
• A Decomposition-Based Memristive Crossbar Solver and FPGA-Accelerated Hardware ImplementationSuyash Vardhan Singh, Anzhelika Kolinko, Md Hasibul Amin, Ramtin Zand, Jason D. Bakos. 581-586 [doi]
• SenGuard: A Novel Processing In-Sensor Method for Privacy-Enhanced Smart ImagingNeeraj Solanki, Sepehr Tabrizchi, Ali Shafiee Sarvestani, Shaahin Angizi, Arman Roohi. 587-592 [doi]
• Magnetic In/Near-Sensor Architectures: From Raw Sensing to Smart ProcessingSepehr Tabrizchi, Ali Shafiee Sarvestani, Md Hasibul Amin, Deniz Najafi, Shaahin Angizi, Ramtin Zand, Arman Roohi. 593-599 [doi]
• TACPlace: Ultrafast Thermal-Aware Chiplet Placement with Feasibility SeekingShan Yu, Haiyang Liu, Xinming Wei, Bizhao Shi, Guojie Luo. 600-605 [doi]
• Breaking Behavioral IPs Design Space LockBaharealsadat Parchamdar, Benjamin Carrion Schafer. 606-611 [doi]
• When Transformer Meets Layout Hotspot: An End-to-End Transformer-based Detector with Prior LithographyWenbo Xu, Silin Chen, Jiale Li, Kangjian Di, Yuxiang Fu, Ningmu Zou. 612-618 [doi]
• Inductance-aware Clock Network Synthesis Considering Hierarchical Interconnects in 3D ICsJindong Zhou, Zi'Ang Ge, Chenbo Xi, Pingqiang Zhou. 619-625 [doi]
• Bridging the Gap between Hardware Fuzzing and Industrial VerificationRuiyang Ma, Tianhao Wei, Jiaxi Zhang 0001, Chun Yang, Jiangfang Yi, Guojie Luo. 626-633 [doi]
• Circuit Synthesis based on Hierarchical Conditional DiffusionXinyi Zhou 0010, Xing Li, Yingzhao Lian, Yiwen Wang, Lei Chen, Mingxuan Yuan, Jianye Hao, Guangyong Chen, Pheng-Ann Heng. 634-640 [doi]
• Application Mapping Method based on Particle Swarm Optimization for Continuous-Flow Microfluidic BiochipsHongjin Su, Zhisheng Chen 0002, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang 0001. 641-646 [doi]
• Timing-Driven Application Mapping for Continuous-Flow Microfluidic BiochipsXinyue Jiao, Youlin Pan, Bowen Liu, Zhen Chen, Genggeng Liu, Xing Huang. 647-652 [doi]
• IR-drop Aware Power Network Synthesis for Power Gating DesignsJai-Ming Lin, Hsin-Lin Chen. 653-658 [doi]
• Intelligence In The Fence: Construct A Privacy and Reliable Hardware Design Assistant LLMShijie Li, Weimin Fu, Yifang Zhao, Xiaolong Guo, Yier Jin. 659-666 [doi]
• CNN Model Optimization Using a Hybrid Approach of Genetic Algorithm-based Pruning and Retraining with Knowledge DistillationKuan-Ling Chou, Cheng-Lung Wang, Yung-Chih Chen, Wuqian Tang, Yi-Ting Li, Shih-Chieh Chang, Chun-Yao Wang. 667-672 [doi]
• LintLLM: An Open-Source Verilog Linting Framework Based on Large Language ModelsZhigang Fang 0002, Renzhi Chen, Zhijie Yang, Yang Guo, Huadong Dai, Lei Wang. 673-680 [doi]
• Overcoming Training Data Scarcity in Routing Demand Prediction via Ensemble LearningYu-Guang Chen, Shih-Cheng Huang, Cheng-Hong Tsai, De-Shiun Fu, Mango Chia-Tso Chao. 681-688 [doi]
• Accurate Fault Detection for Wavelength-Routed Optical Networks-on-Chip Under Thermal VariationYu Zhou, Zhidan Zheng, Liaoyuan Cheng, Jiahong Huang, Tsun-Ming Tseng, Ulf Schlichtmann. 689-696 [doi]
• Enhancing AMS Circuit Reliability: An Anomaly Dataset for Functional Safety Research in Automotive SoCsSanjay Das, Anand Menon, Omar Abiola Abioye, Afreen Fatimah Khazi-Syed, Jonathan Edward Lee, Ayush Arunachalam, Shamik Kundu, Pooja Madhusoodhanan, Prasanth Viswanathan Pillai, Rubin A. Parekhji, Arnab Raha, Suvadeep Banerjee, Suriyaprakash Natarajan, Kanad Basu. 697-703 [doi]
• A Pixel Histogram-Based Safety Mechanism and Fault Detection Methodology for a Robust Image Signal ProcessorJulian Höfer, Patrick Schmidt, Hella Toto-Kiesa, Sebastian Höfer, Gregor Schewior, Dietmar Engelke, Karl-Heinz Eickel, Darius Grantz, Tanja Harbaum, Jürgen Becker 0001. 704-711 [doi]
• HCTSR: A Hybrid CNN/Transformer Super-Resolution Processor with Depth-Scalable Non-Overlapping Window AttentionXinhua Shi, Kaiqi Chen, Xuyang Duan, Jun Han 0003. 712-717 [doi]
• InFormer: A High-throughput, Ultra-efficient In-memory Compute-based Floating-point Arithmetic Accelerator for TransformersHasita Veluri, Dilip Vasudevan. 718-725 [doi]
• EATS: Energy-Aware Adaptive Topology Switching for NoCsMan Wu, Shaswot Shresthamali, Xiaoman Liu, Yuan He 0002. 726-732 [doi]
• AttenPU: An Area Efficient Attention Processor with Reconfigurable FP8 Precision and DataflowQiawei Zheng, Pu Zhou, Zheng Wang, Zhuoyu Wu, Yike Li, Zhihao Du, Chao Chen, Yongkui Yang, Wenqi Fang, Anupam Chattopadhyay. 733-739 [doi]
• On the Effectiveness of Piecewise Activation Approximations for Long-Term Short-Memory NetworksSrinivas Rahul Sapireddy, Mostafizur Rahman. 740-745 [doi]
• Optimal Device Sequencing and Kernel Assignment for Multiple Heterogeneous Machine Learning AcceleratorsTejas Bachhav, Amol Kerkar, Rahul Rana, Patrick Madden. 746-751 [doi]
• An Effective Voltage-drop Aware Analytical Placement ApproachJai-Ming Lin, Pin-Yu Chen, Min-Chia Tsai, Chen-Fa Tsai, De-Shiun Fu, Che-Li Lin. 752-757 [doi]
• ML4SODA: A Decision Tree Guided Design Space Exploration for Fast and High Quality MLIR-based HLSDarshith Manjunath, Nicolas Bohm Agostini, Antonino Tumeo, Jeff Zhang 0001, Chaitali Chakrabarti. 758-763 [doi]
• An Effective Macro Placement Framework with Reinforcement Learning and Monte Carlo Tree SearchJinghao Ding, Wenxin Yu 0001, Yuanrui Qi, Zhaoqi Fu, Mengshi Gong, I-Chyn Wey, Jinjia Zhou. 764-769 [doi]
• Strategic Rip-Up and RerouteRowan Devereux-Smith, Patrick H. Madden. 770-776 [doi]
• LoRAFusion: A Crossbar-aware Multi-task Adaption Framework via Efficient Fusion of Pretrained LoRA ModulesJingkai Guo, Asmer Hamid Ali, Li Yang 0009, Deliang Fan. 777-783 [doi]
• Digital Predistortion for Quadrature Digital Power Amplifiers Using Deep Neural Network of AT_LSTM: Attention LSTMJiayu Yang, Wending Zhao, Yicheng Li, Wang Wang, Zixu Li, Manni Li, Zijian Huang 0017, Yinyin Lin, Yun Yin, Hongtao Xu. 784-790 [doi]
• AutoRAC: Automated Processing-in-Memory Accelerator Design for Recommender SystemsFeng Cheng, Tunhou Zhang, Junyao Zhang, Jonathan Hao-Cheng Ku, Yitu Wang, Xiaoxuan Yang, Hai Li 0001, Yiran Chen 0001. 791-797 [doi]
• D-GCN: A Dynamic Pruning Accelerator for Deep Graph Convolutional Networks with Hybrid DataflowShun Li, Hao Zhou, Enhao Tang, Yang Liu, Shidi Tang, Ming Ling. 798-804 [doi]
• Multi-DOF Fusion: A Flexible Fusion Strategy for Reducing Redundancy in CNN WorkloadsYaqi Chen, Zikang Zhou, Siyao Dai, Xuyang Duan, Jun Han 0003. 805-810 [doi]
• From Prompt to Accelerator: A Perspective on LLM-Based Analog In-Memory Accelerator Design AutomationDeepak Vungarala, Md Hasibul Amin, Arman Roohi, Arnob Ghosh, Ramtin Zand, Shaahin Angizi. 811-816 [doi]
• Maximizing Sub-Array Resource Utilization in Digital Processing-in-Memory: A Versatile Hardware-Aware ApproachGamana Aragonda, Deniz Najafi, Deepak Vungarala, Sepehr Tabrizchi, Arman Roohi, Shaahin Angizi. 817-822 [doi]
• Robust Data Processing for Vector Symbolic ComputingMehran Shoushtari Moghadam, Abu Kaisar Mohammad Masum, Sercan Aygun, M. Hassan Najafi. 823-828 [doi]
• Analog vs. Digital In-Sensor Computing: A Tale of Two ParadigmsGourav Datta, Chengwei Zhou. 829-834 [doi]
• A Hardware Prototype of an MRAM-based Stochastic Computing SystemZhengkun Yu, Tianhan Fei, Hao Cai, Heng Shi, Yumeng Yang, Siting Liu 0001. 835-840 [doi]
• Transformers for Secure Hardware Systems: Applications, Challenges, and OutlookBanafsheh Saber Latibari, Najmeh Nazari, Avesta Sasan, Houman Homayoun, Pratik Satam, Soheil Salehi, Hossein Sayadi. 841-848 [doi]
• Quantum Transfer Learning to Boost Dementia DetectionSounak Bhowmik, Talita Perciano, Himanshu Thapliyal. 849-853 [doi]
• Energy-Efficient Quantization-Aware Training with Dynamic Bit-Width OptimizationAli Karkehabadi, Avesta Sasan. 854-859 [doi]
• TinyML Based Biometric Authentication Using PPG Signals for Edge DevicesYogeswar Reddy Thota, Jeffrey Scott Nixon, Bhavya Chandran, Tooraj Nikoubin. 860-865 [doi]
• Oxho-3D: An Analytical Die-to-Die 3D Placement EngineWanling Si, Xingyu Tong 0001, Sijie Zhou, Liang Gao, Jianli Chen, Wenchao Gao. 866-872 [doi]
• VAER: Via-Aware Escape Routing for Chiplet InterconnectionHaochang Tian, Weiqing Ji, Mingyang Kou, Chengkai Wang, Fei Li, Hailong Yao. 873-878 [doi]
• AuxiliarySRAM: Exploring Elastic On-Chip Memory in 2.5D Chiplet Systems DesignZichao Ling, Lin Li, Yi Huang, Yixin Xuan, Jianwang Zhai, Kang Zhao. 879-885 [doi]
• Enhancing Modern SAT Solver With Machine Learning MethodGuanting Chen, Jia Wang. 886-892 [doi]
• Embedded Neurally Inspired Visual ProcessingG. William Chapman, Frances S. Chance. 893-897 [doi]
• Benchmarking Spiking Network Partitioning Methods on Loihi 2William Severa, Felix Wang, Yang Ho, Fred Rothganger, Anurag Reddy Daram, Efrain Gonzalez. 898-904 [doi]
• Resistorless Grounded Memristor Emulator Using OTA-OTRA for low power edge computingShekhar Suman Borah, Prabha Sundaravadivel, Krishna N. Reddy. 905-910 [doi]
• TinyML Enabled Real-Time Bearing Fault Classification in Motors Using Vibration SignalsYogeswar Reddy Thota, Mojtaba Afshar, Samantha Boden, Brendan Dunlap, Bilal Akin, Tooraj Nikoubin. 911-915 [doi]
• LiteNoC: Developing Low-Cost Network-on-Chips for Deep Neural NetworksKhoa Ho, Siamak Biglari, Justin Garrigus, Hui Zhao 0013, Saraju P. Mohanty. 916-921 [doi]
• A Light-Speed Large Language Model Accelerator with Optical Stochastic ComputingSalma Afifi, Oluwaseun Alo, Ishan G. Thakkar, Sudeep Pasricha. 922-928 [doi]
• Sustainable Carbon-Aware and Water-Efficient LLM Scheduling in Geo-Distributed Cloud DatacentersHayden Moore, Sirui Qi, Ninad Hogade, Dejan S. Milojicic, Cullen E. Bash, Sudeep Pasricha. 929-934 [doi]
• QPUF 3.0: Sustainable Cybersecurity of Smart Grid through Security-By-Design based on Quantum-PUF and Quantum Key DistributionVenkata Karthik Vishnu Vardhan Bathalapalli, Saraju P. Mohanty, Chenyun Pan, Elias Kougianos. 935-940 [doi]
• TinyML Based Stress Detection utilizing PPG Signals: A Lightweight Approach for Smart Wearable DevicesPriyanka Ganesan, Yogeswar Reddy Thota, Hashem Shehata, Tooraj Nikoubin. 941-946 [doi]
• Unified Gravity Loss for Robust Neural Networks Through Feature Space OptimizationAli Karkehabadi, Houman Homayoun, Avesta Sasan. 947-953 [doi]
• LightBench: A Hardware-Aware Trusted Execution Platform for Intelligent Malware Detection at the EdgeNing Miao, Hossein Sayadi, Kumara Srivatsa Kondapalli, Mahdi Eslamimehr, Houman Homayoun. 954-961 [doi]
• VisNAV: An Autonomous, Unified, Focus-assisted Navigation in UAVs for Agricultural Field OperationsTamonash Bhattacharyya, Aryan Anand, Prabha Sundaravadivel, Henry A. Torbert. 962-967 [doi]
• Robust Reasoning and Learning with Brain-Inspired Representations under Hardware-Induced NonlinearitiesWilliam Youngwoo Chung, Hamza Errahmouni Barkam, Tamoghno Das, Mohsen Imani. 968-975 [doi]
• Adversarial Data Poisoning Attack on Quantum Machine Learning in the NISQ EraSatwik Kundu, Swaroop Ghosh. 976-981 [doi]
• BrIM: A Branching In-Memory AcceleratorStefan Maczynski, Amlan Ganguly, Mark A. Indovina, Purab Ranjan Sutradhar, Sai Manoj Pudukotai Dinakarrao, Sathwika Bavikadi. 982-989 [doi]
• Emotion Detection in Older Adults Using Physiological Signals from Wearable SensorsMd. Saif Hassan Onim, Andrew Kiselica, Himanshu Thapliyal. 990-995 [doi]
• AI-Powered Knowledge Graphs for Neuromorphic and Energy-Efficient ComputingAshish Gautam, Robert M. Patton, Thomas E. Potok, Ramakrishnan Kannan, James B. Aimone, William Severa. 996-1001 [doi]
• Multi-Parameter Comparative Study of Selective In-Memory Computing Processor Architectures for Performance Optimization in Accelerated Edge ComputingV. Mohith, Shekhar Suman Borah, Prabha Sundaravadivel, R. Sakthivel. 1002-1007 [doi]