Abstract is missing.
- Using EEMBC Benchmarks to Understand Processor Behavior in Embedded ApplicationsMarkus Levy. 3-4 [doi]
- The Chip-Multiprocessing Paradigm Shift: Opportunities and ChallengesPer Stenström. 5 [doi]
- Software Defined Radio - A High Performance Embedded ChallengeHyunseok Lee, Yuan Lin, Yoav Harel, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Krisztián Flautner. 6-26 [doi]
- A Practical Method for Quickly Evaluating Program OptimizationsGrigori Fursin, Albert Cohen, Michael F. P. O Boyle, Olivier Temam. 29-46 [doi]
- Efficient Sampling Startup for Sampled Processor SimulationMichael Van Biesbrouck, Lieven Eeckhout, Brad Calder. 47-67 [doi]
- Enhancing Network Processor Simulation Speed with Statistical Input SamplingJia Yu, Jun Yang, Shaojie Chen, Yan Luo, Laxmi N. Bhuyan. 68-83 [doi]
- Power Aware External Bus Arbitration for System-on-a-Chip Embedded SystemsKe Ning, David R. Kaeli. 87-101 [doi]
- Beyond Basic Region Caching: Specializing Cache Structures for High Performance and Energy ConservationMichael J. Geiger, Sally A. McKee, Gary S. Tyson. 102-115 [doi]
- Streaming Sparse Matrix Compression/DecompressionDavid Moloney, Dermot Geraghty, Colm McSweeney, Ciarán McElroy. 116-129 [doi]
- XAMM: A High-Performance Automatic Memory Management System with Memory-Constrained DesignsGansha Wu, Xin Zhou, Guei-Yuan Lueh, Jesse Z. Fang, Peng Guo, Jinzhan Peng, Victor Ying. 130-149 [doi]
- Memory-Centric Security ArchitectureWeidong Shi, Chenghuai Lu, Hsien-Hsin S. Lee. 153-168 [doi]
- A Novel Batch Rekeying Processor Architecture for Secure Multicast Key ManagementAbdulhadi Shoufan, Sorin A. Huss, Murtuza Cutleriwala. 169-183 [doi]
- Arc3D: A 3D Obfuscation ArchitectureMahadevan Gomathisankaran, Akhilesh Tyagi. 184-199 [doi]
- Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic OptimizationsJinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew. 203-217 [doi]
- Induction Variable Analysis with Delayed AbstractionsSebastian Pop, Albert Cohen, Georges-André Silber. 218-232 [doi]
- Garbage Collection HintsDries Buytaert, Kris Venstermans, Lieven Eeckhout, Koen De Bosschere. 233-248 [doi]
- Exploiting a Computation Reuse Cache to Reduce Energy in Network ProcessorsBengu Li, Ganesh Venkatesh, Brad Calder, Rajiv Gupta. 251-265 [doi]
- Dynamic Evolution of Congestion Trees: Analysis and Impact on Switch ArchitecturePedro Javier García, Jose Flich, José Duato, Ian Johnson, Francisco J. Quiles, Finbar Naven. 266-285 [doi]
- A Single (Unified) Shader GPU Microarchitecture for Embedded SystemsVictor Moya Del Barrio, Carlos González, Jordi Roca, Agustin Fernández, Roger Espasa. 286-301 [doi]
- A Low-Power DSP-Enhanced 32-Bit EISC ProcessorHyun-Gyu Kim, Hyeong-Cheol Oh. 302-316 [doi]