Proceedings of the Fifth International Workshop on Interconnection Network Architecture - On-Chip, Multi-Chip, INA-OCMC '11, Heraklion, Greece, January 23, 2011 - researchr publication

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José Flich, Davide Bertozzi, Tor Skeie, Daniele Ludovici, editors, Proceedings of the Fifth International Workshop on Interconnection Network Architecture - On-Chip, Multi-Chip, INA-OCMC '11, Heraklion, Greece, January 23, 2011. ACM, 2011. [doi]

Conference: hipeac2011

Abstract is missing.

Emerging silicon photonics technologies for multi-core platform architecturesLuca P. Carloni. 1 [doi]

protocol for SDRAM access through networks on chipKhaldon Hassan, Frédéric Pétrot, Riccardo Locatelli, Marcello Coppola. 3-6 [doi]

An improved algorithm for slot selection in the Æthereal network-on-chipRadu Andrei Stefan, Kees Goossens. 7-10 [doi]

iFDOR: dynamic rerouting on-chipFrank Olaf Sem-Jacobsen, Samuel Rodrigo, Tor Skeie. 11-14 [doi]

Process scheduling for future multicore processorsThomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen. 15-18 [doi]

Switch allocator for bufferless network-on-chip routersGiorgos Dimitrakopoulos, Kostas Galanopoulos. 19-22 [doi]

A power-efficient network on-chip topologyJ. Camacho, José Flich, José Duato, Hans Eberle, Wladek Olesinski. 23-26 [doi]

Mesochronous NoC technology for power-efficient GALS MPSoCsDaniele Ludovici, Alessandro Strano, Georgi Nedeltchev Gaydadjiev, Davide Bertozzi. 27-30 [doi]

Abstract modelling of switching elements for optical networks-on-chip with technology platform awarenessAlberto Parini, Luca Ramini, Gaetano Bellanca, Davide Bertozzi. 31-34 [doi]

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