Table of Contents

• SambaNova SN10 RDU: Accelerating Software 2.0 with DataflowRaghu Prabhakar, Sumti Jairath. 1-37 [doi]
• Skydio Autonomy Engine: Enabling The Next Generation Of Autonomous FlightAbraham Bachrach. 1-43 [doi]
• AI Compute Chip from EnflameRyan Liu, Chuang Feng. 1-27 [doi]
• rd Hot Chips Symposium - August 22-24, 2021Thierry Tambe, En-Yu Yang, Glenn G. Ko, Yuji Chai, Coleman Hooper, Marco Donato, Paul N. Whatmough, Alexander M. Rush, David Brooks 0001, Gu-Yeon Wei. 1-13 [doi]
• EDGE Q 5G with an EDGESriram Rajagopal. 1-13 [doi]
• ENIAD: A Reconfigurable Near-data Processing Architecture for Web-Scale AI-enriched Big Data ServiceJialiang Zhang, JingJane Li. 1-8 [doi]
• RDNA™ 2 Gaming ArchitectureAndrew Pomianowski. 1-18 [doi]
• Exynos 1080 High-performance, low-power CPU and GPU with AMIGOTaehee Lee, Dongkeun Kim, Joonseok Kim 0002. 1-14 [doi]
• System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous ArchitectureTrong-Thuc Hoang, Ckristian Duran, Ronaldo Serrano, Marco Sarmiento, Khai-Duy Nguyen, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham. 1-16 [doi]
• LightOn Optical Processing Unit : Scaling-up AI and HPC with a Non von Neumann co-processorCharles Brossollet, Alessandro Cappelli, Igor Carron, Charidimos Chaintoutis, Amélie Chatelain, Laurent Daudet, Sylvain Gigan, Daniel Hesslow, Florent Krzakala, Julien Launay, Safa Mokaadi, Fabien Moreau, Kilian Müller, Ruben Ohana, Gustave Pariente, Iacopo Poli, Giuseppe Luca Tommasone. 1-11 [doi]
• Alder Lake ArchitectureEfraim Rotem, Yuli Mandelblat, Vadim Basin, Eliezer Weissmann, Arik Gihon, Rajshree Chabukswar, Russ Fenger, Monica Gupta. 1-23 [doi]
• Industry's First 7.2 Gbps 512GB DDR5 ModuleSung Joo Park, Jonghoon J. Kim, Kun Joo, Young-Ho Lee, Kyoungsun Kim, Young-Tae Kim, Woo-Jin Na, IkJoon Choi, Hye-Seung Yu, Wonyoung Kim, Ju-Yeon Jung, Jaejun Lee, Dohyung Kim, Young-Uk Chang, Gong-Heum Han, Hangi-Jung, Sunwon Kang, Jeonghyeon Cho, Hoyoung Song, Tae-young Oh, Young-Soo Sohn, Sangjoon Hwang, Jooyoung Lee. 1-11 [doi]
• Xilinx Edge ProcessorsRoss Freeman, James V. Barnett, Bernard V. Vonderschmitt. 1-21 [doi]
• Intel's Hyperscale-Ready Infrastructure Processing Unit (IPU)Brad Burres, Dan Daly, Mark Debbage, Eliel Louzoun, Christine Severns-Williams, Naru Sundar, Nadav Turbovich, Barry Wolford, Yadong Li. 1-16 [doi]
• Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation AlignerKota Ando, Jaehoon Yu, Kazutoshi Hirose, Hiroki Nakahara, Kazushi Kawamura, Thiem Van Chu, Masato Motomura. 1-21 [doi]
• nd generation high performance infrastructure CPUs and system IPsAndrea Pellegrini. 1-27 [doi]
• ® Cloud Al 100 : 12TOPS/W Scalable, High Performance and Low Latency Deep Learning Inference AcceleratorKaram Chatha. 1-19 [doi]
• OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed DataJuhyoung Lee, Sangyeob Kim, Ji-Hoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Hoi-Jun Yoo. 1-21 [doi]
• Nvidia Data Center Processing Unit (DPU) ArchitectureIdan Burstein. 1-20 [doi]
• GraphcoreSimon Knowles. 1-25 [doi]
• eHPC Ponte VecchioDavid Blythe. 1-34 [doi]
• Mozart: Designing for Software Maturity and the Next Paradigm for Chip ArchitecturesKaru Sankaralingam, Tony Nowatzki, Greg Wright, Poly Palamuttam, Jitu Khare, Vinay Gangadhar, Preyas Shah. 1-20 [doi]
• Quantum Computing with AtomsChristopher Monroe. 1-26 [doi]
• A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-ChipKhai-Duy Nguyen, Tuan-Kiet Dang, Trong-Thuc Hoang, Quynh Nguyen Quang Nhu, Cong-Kha Pham. 1-13 [doi]
• Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyondJin Hyun Kim, Shinhaeng Kang, Sukhan Lee 0002, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, SeungWon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, JiHyun Choi, Jinin So, YeonGon Cho, Joon Ho Song, Jangseok Choi, Jeonghyeon Cho, Kyomin Sohn, Young-Soo Sohn, Kwang-Il Park, Nam Sung Kim. 1-26 [doi]
• The ΛNTON 3 ASIC: a Fire-Breathing Monster for Molecular Dynamics SimulationsPeter J. Adams, Brannon Batson, Alistair Bell, Jhanvi Bhatt, J. Adam Butts, Timothy Correia, Bruce Edwards, Peter Feldmann, Christopher H. Fenton, Anthony Forte, Joseph Gagliardo, Gennette Gill, Maria Gorlatova, Brian Greskamp, J. P. Grossman, Jeremy Hunt, Bryan L. Jackson, Mollie M. Kirk, Jeffrey Kuskin, Roy J. Mader, Richard McGowen, Adam McLaughlin, Mark A. Moraes, Mohamed Nasr, Lawrence J. Nociolo, Lief O'Donnell, Andrew Parker, Jon L. Peticolas, Terry Quan, T. Carl Schwink, Keun Sup Shim, Naseer Siddique, Jochen Spengler, Michael Theobald, Brian Towles, William Vick, Stanley C. Wang, Michael E. Wazlowski, Madeleine J. Weingarten, John M. Williams, David E. Shaw. 1-22 [doi]
• A Plug-and-Play Universal Photonic Processor for Quantum Information ProcessingCaterina Taballione. 1-4 [doi]
• Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and HardwareTodd M. Austin, Austin Harris 0001, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari. 1-18 [doi]
• Video Coding Unit (VCU) : Hot Chips 2021Aki Kuusela, Clinton Wills Smullen IV. 1-30 [doi]
• Sapphire RapidsArijit Biswas. 1-22 [doi]
• Mojo Lens - AR Contact Lenses for Real PeopleMike Wiemer, Renaldi Winoto. 1-56 [doi]
• High Performance Low Power Controller for Data Center SSDsSeungWon Lee, JuHyung Hong, Chulseung Lee, Sandeep Vallabhaneni, SoonGon Kim, Yong Jin Shin, Mijung Noh, Soon-jae Won, Soonbok Jang, Yong Ho Song. 1-7 [doi]
• Real-time AI for Enterprise Workloads: the IBM Telum ProcessorChristian Jacobi. 1-22 [doi]
• Heterogeneous computing to enable highest level of safetyRamanujan Venkatadri. 1-39 [doi]
• Dynamic Neural Accelerator for Reconfigurable & Energy-efficient Neural Network InferenceNikolay Nez, Antonio N. Vilchez, Hamid R. Zohouri, Oleg Khavin, Sakyasingha Dasgupta. 1-21 [doi]
• New Value Creation by Nano-Tactile Sensor Chip Exceeding our Fingertip Discrimination AbilityHidekuni Takao, Kazuki Watatani, Kazutami Arimoto. 1-36 [doi]
• World Largest Mobile Image Sensor with All Directional Phase Detection Auto Focus FunctionSukki Yoon, Jungbin Yun, Yun-Hwan Jung, Ilyun Jeong, Junghee Choi, Wooseok Choi, Jeongguk Lee, Hansoo Lee, Juhyun Ko. 1-22 [doi]
• SOT-MRAM - Third generation MRAM memory opens new opportunities : Hot Chips Conference August 2021Barry Hoberman, Jean-Pierre Nozieres. 1-10 [doi]
• An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-MemoryJuhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo. 1-20 [doi]
• PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM AccessSangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo. 1-23 [doi]
• Photonic co-processors in HPC: Using LightOn OPUs for Randomized Numerical Linear AlgebraDaniel Hesslow, Alessandro Cappelli, Igor Carron, Laurent Daudet, Raphaël Lafargue, Kilian Müller, Ruben Ohana, Gustave Pariente, Iacopo Poli. 1-9 [doi]
• Multi-Million Core, Multi-Wafer AI ClusterSean Lie. 1-41 [doi]
• Next Generation "Zen 3" CoreMark Evers, Leslie Barnes, Mike Clark. 1-32 [doi]
• A Photonic Neural Network Using < 1 Photon per Scalar MultiplicationTianyu Wang, Shi-Yuan Ma, Logan G. Wright, Tatsuhiro Onodera, Brian C. Richard, Peter L. McMahon. 1-15 [doi]
• Samsung Neural Processing Unit : An AI accelerator and SDK for flagship mobile APJun-Seok Park, Heonsoo Lee, Dongwoo Lee, Jewoo Moon, Suknam Kwon, Sanghyuck Ha, Minseong Kim, Junghun Park, Jihoon Bang, SukHwan Lim, Inyup Kang. 1-21 [doi]
• Accelerating ML Recommendation with over a Thousand RISC-V/Tensor Processors on Esperanto's ET-SoC-1 ChipDavid R. Ditzel, Roger Espasa, Nivard Aymerich, Allen Baum, Tom Berg, Jim Burr, Eric Hao, Jayesh Iyer, Miquel Izquierdo, Shankar Jayaratnam, Darren Jones, Chris Klingner, Jin Kim, Stephen Lee, Marc Lupon, Grigorios Magklis, Bojan Maric, Rajib Nath, Mike Neilly, J. Duane Northcutt, Bill Orner, Jose Renau, Gerard Reves, Xavier Reves, Tom Riordan, Pedro Sanchez, Sridhar Samudrala, Guillem Sole, Raymond Tang, Tommy Thorn, Francisco Torres, Sebastia Tortella, Daniel Yau. 1-23 [doi]
• Architectural challenges: AI Chips, Decision Support and High Performance ComputingDimitri Kusnezov. 1-21 [doi]