Abstract is missing.
- On Behavioral ProgrammingDavid Harel. 1 [doi]
- Verifying Real-Time Software Is Not Reasonable (Today) - Abstract of Invited TalkEdward A. Lee. 2 [doi]
- SMT in Verification, Modeling, and Testing at MicrosoftNikolaj Bjørner. 3 [doi]
- Reducing Costs While Increasing QualityOrna Raz. 4 [doi]
- Special Session on Security VerificationAlex Goryachev. 5 [doi]
- Circuit Primitives for Monitoring Information Flow and Enabling RedundancyRyan Kastner. 6 [doi]
- Formal Analysis of Security Data Paths in RTL DesignJamil Mazzawi, Ziyad Hanna. 7 [doi]
- Precise Detection of Atomicity ViolationsRicardo J. Dias, Vasco Pessanha, João Lourenço. 8-23 [doi]
- Proving Mutual Termination of ProgramsDima Elenbogen, Shmuel Katz, Ofer Strichman. 24-39 [doi]
- Knowledge Based Transactional BehaviorSaddek Bensalem, Marius Bozga, Doron Peled, Jean Quilbeuf. 40-55 [doi]
- Repair with On-The-Fly Program AnalysisRobert Könighofer, Roderick Bloem. 56-71 [doi]
- Computing Interpolants without ProofsHana Chockler, Alexander Ivrii, Arie Matsliah. 72-85 [doi]
- MaxSAT-Based MCS EnumerationAntónio Morgado, Mark H. Liffiton, Joao Marques-Silva. 86-101 [doi]
- Automated Reencoding of Boolean FormulasNorbert Manthey, Marijn Heule, Armin Biere. 102-117 [doi]
- Leveraging Accelerated Simulation for Floating-Point RegressionJohn Paul, Elena Guralnik, Anatoly Koyfman, Amir Nahir, Subrat Panda. 118-131 [doi]
- Coverage-Based Trace Signal Selection for Fault Localisation in Post-silicon ValidationCharlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik. 132-147 [doi]
- A Novel Approach for Implementing Microarchitectural Verification Plans in Processor DesignsYoav Katz, Michal Rimon, Avi Ziv. 148-161 [doi]
- Statistical Model Checking for Safety Critical Hybrid Systems: An Empirical EvaluationYoung-Joo Kim, Moonzoo Kim, Tai Hyo Kim. 162-177 [doi]
- A New Test-Generation Methodology for System-Level Verification of Production ProcessesAllon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman, Gil Shurek. 178-192 [doi]
- Defining and Model Checking Abstractions of Complex Railway Models Using CSP||BFaron Moller, Hoang Nga Nguyen, Markus Roggenbach, Steve Schneider, Helen Treharne. 193-208 [doi]
- Word Equations with Length Constraints: What's Decidable?Vijay Ganesh, Mia Minnes, Armando Solar-Lezama, Martin C. Rinard. 209-226 [doi]
- Environment-Friendly SafetyOrna Kupferman, Sigal Weiner. 227-242 [doi]
- Deterministic Compilation of Temporal Safety Properties in Explicit State Model CheckingKristin Yvonne Rozier, Moshe Y. Vardi. 243-259 [doi]
- FoREnSiC- An Automatic Debugging Environment for C ProgramsRoderick Bloem, Rolf Drechsler, Görschwin Fey, Alexander Finder, Georg Hofferek, Robert Könighofer, Jaan Raik, Urmas Repinski, André Sülflow. 260-265 [doi]
- Towards Beneficial Hardware Acceleration in HAVEN: Evaluation of Testbed ArchitecturesMarcela Simková, Ondrej Lengál. 266-273 [doi]
- Using Domain Specific Languages to Support Verification in the Railway DomainPhillip James, Arnold Beckmann, Markus Roggenbach. 274-275 [doi]
- From Fault Injection to Mutant Injection: The Next Step for Safety Analysis?Guillermo Rodríguez-Navas, Patrick J. Graydon, Iain Bate. 276-277 [doi]
- Test Case Generation by Grammar-Based Fuzzing for Model-Driven EngineeringMagdalena Widl. 278-279 [doi]