Abstract is missing.
- Wild speculation on consumer workloads in 2010-2020Tim Sweeney. 1 [doi]
- We have it easy, but do we have it right?Amer Diwan. 2 [doi]
- Energy-aware application scheduling on a heterogeneous multi-core systemJian Chen, Lizy Kurian John. 5-13 [doi]
- Parallelization and characterization of SIFT on multi-core systemsHao Feng, Eric Li, Yurong Chen, Yimin Zhang. 14-23 [doi]
- Implications of cache asymmetry on server consolidation performancePadma Apparao, Ravi R. Iyer, Donald Newell. 24-32 [doi]
- STAMP: Stanford Transactional Applications for Multi-ProcessingChi Cao Minh, JaeWoong Chung, Christos Kozyrakis, Kunle Olukotun. 35-46 [doi]
- PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-MultiprocessorsChristian Bienia, Sanjeev Kumar, Kai Li. 47-56 [doi]
- Characterizing and improving the performance of Intel Threading Building BlocksGilberto Contreras, Margaret Martonosi. 57-66 [doi]
- Whiteboards that compute: A workload analysisRyan Dixon, Timothy Sherwood. 69-78 [doi]
- A workload for evaluating deep packet inspection architecturesMichela Becchi, Mark A. Franklin, Patrick Crowley. 79-89 [doi]
- Empirical examination of a collaborative web applicationChristopher Stewart, Matthew Leventi, Kai Shen. 90-96 [doi]
- Temporal streams in commercial server applicationsThomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos. 99-108 [doi]
- Workload characterization of selected JEE-based Web 2.0 applicationsPriya Nagpurkar, William Horn, U. Gopalakrishnan, Niteesh Dubey, Joefon Jann, Pratap Pattnaik. 109-118 [doi]
- Characterization of storage workload traces from production Windows ServersSwaroop Kavalanekar, Bruce L. Worthington, Qi Zhang, Vishal Sharda. 119-128 [doi]
- Evaluating the impact of dynamic binary translation systems on hardware cache performanceArkaitz Ruiz-Alvarez, Kim M. Hazelwood. 131-140 [doi]
- Can hardware performance counters be trusted?Vincent M. Weaver, Sally A. McKee. 141-150 [doi]
- On the representativeness of embedded Java benchmarksCiji Isen, Lizy Kurian John, Jung Pil Choi, Hyo Jung Song. 153-162 [doi]
- Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesisClay Hughes, Tao Li. 163-172 [doi]
- Reproducible simulation of multi-threaded workloads for architecture design explorationCristiano Pereira, Harish Patil, Brad Calder. 173-182 [doi]