Abstract is missing.
- Hardware Support for Histogram-Based Performance Analysis of Embedded SystemsThomas Ballenthin, Boris Dreyer, Christian Hochberger, Simon Wegener. 1-10 [doi]
- Essential Data Elements: Extraction and RecoveryXiteng Liu. 11-19 [doi]
- Real-Time, Non-instrusive Instrumentation and Monitoring of Standards-Based Event-Based ApplicationsGeetha R. Satyanarayana, LiRen Tu, Nyalia Lui, James H. Hill. 20-27 [doi]
- Short Paper: Towards Low-Cost Indoor Localization Using Edge Computing ResourcesShweta Prabhat Khare, János Sallai, Abhishek Dubey, Aniruddha S. Gokhale. 28-31 [doi]
- Extensible Energy Planning Framework for Preemptive TasksJin Hyun Kim, Deepak Gangadharan, Oleg Sokolsky, Axel Legay, Insup Lee. 32-41 [doi]
- In the Heat of Conflict: On the Synchronisation of Critical SectionsStefan Reif, Timo Hönig, Wolfgang Schröder-Preikschat. 42-51 [doi]
- Responsive Task for Real-Time CommunicationHiroyuki Chishiro, Kohei Osawa, Nobuyuki Yamasaki. 52-59 [doi]
- Expected Completion Time Aware Message Scheduling for UM-BUS Interconnected SystemJiqin Zhou, Weigong Zhang, Keni Qiu, Ruiying Bai, Ying Wang, Xiaoyan Zhu. 60-66 [doi]
- Determining the Communication Load for Self-Building Embedded Systems Based on Artificial DNAUwe Brinkschulte. 67-75 [doi]
- Improving Performance of Single-Path Code through a Time-Predictable Memory HierarchyBekim Cilku, Wolfgang Puffitsch, Daniel Prokesch, Martin Schoeberl, Peter P. Puschner. 76-83 [doi]
- A Dynamic Memory Management Unit for Real Time SystemsNicholas Harvey-Lees-Green, Morteza Biglari-Abhari, Avinash Malik, Zoran A. Salcic. 84-91 [doi]
- A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time SystemsLuca Pezzarossa, Martin Schoeberl, Jens Sparsø. 92-100 [doi]
- Static WCET Analysis of GPUs with Predictable Warp SchedulingYijie Huangfu, Wei Zhang 0002. 101-108 [doi]
- A Reordering Framework for Testing Message-Passing SystemsMilad Irannejad, Guy Martin Tchamgoue, Sebastian Fischmeister. 109-116 [doi]
- A CAN Restbus HiL Elevator Simulator Based on Code Reuse and Device Para-VirtualizationCarlos Fernando Nicolas, Iban Ayestaran, Tomaso Poggi, Goiuria Sagardui, Jose-Maria Martin. 117-124 [doi]
- RIAPS: Resilient Information Architecture Platform for Decentralized Smart SystemsScott Eisele, Istvan Mardari, Abhishek Dubey, Gabor Karsai. 125-132 [doi]
- A Self-Healing Framework for Building Resilient Cyber-Physical SystemsDenise Ratasich, Oliver Höftberger, Haris Isakovic, Muhammad Shafique, Radu Grosu. 133-140 [doi]
- ViDAQ: A Framework for Monitoring Human Machine InterfacesHarsh V. P. Singh, Qusay H. Mahmoud. 141-149 [doi]
- Multi-mode P-FRP Task SchedulingXingliang Zou, Albert M. K. Cheng, Carlos Rincon, Yu Jiang. 150-157 [doi]
- An End-to-End Toolchain: From Automated Cost Modeling to Static WCET and WCEC AnalysisVolkmar Sieh, Robert Burlacu, Timo Hönig, Heiko Janker, Phillip Raffeck, Peter Wägemann, Wolfgang Schröder-Preikschat. 158-167 [doi]
- A Model Driven Approach for Cardiac Pacemaker Design Using a PRET ProcessorNathan Allen, Hammond A. Pearce, Partha S. Roop, Reinhard von Hanxleden. 168-175 [doi]
- A Cache-Coherent Heterogeneous Architecture for Low Latency Real Time ApplicationsMichel Gemieux, Yvon Savaria, Jean-Pierre David, Guchuan Zhu. 176-184 [doi]
- A Soft Real-Time Scheduling Engine for Cost Reduction in Freemium CompaniesAlex Magalhães, Luciana Rech, Ricardo Moraes. 185-192 [doi]
- An Analysis of Lazy and Eager Limited Preemption Approaches under DAG-Based Global Fixed Priority SchedulingMaria A. Serrano, Alessandra Melani, Sebastian Kehr, Marko Bertogna, Eduardo Quiñones. 193-202 [doi]
- Finding a Steady State Point for Fixed Priority Independent Periodic Real-Time Tasks with Arbitrary Given Release OffsetsYue Qin, Xingliang Zou, Albert M. K. Cheng, Yu Jiang. 203-206 [doi]