Abstract is missing.
- RAMP: research accelerator for multiple processors - a community vision for a shared experimental parallel HW/SW platformDavid A. Patterson. 1 [doi]
- Simulation sampling with live-pointsThomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe. 2-12 [doi]
- Accelerating architectural exploration using canonical instruction segmentsRose F. Liu, Krste Asanovic. 13-24 [doi]
- Branch trace compression for snapshot-based simulationKenneth C. Barr, Krste Asanovic. 25-36 [doi]
- Critical path analysis of the TRIPS architectureRamadass Nagarajan, Xia Chen, Robert G. McDonald, Doug Burger, Stephen W. Keckler. 37-47 [doi]
- Characterizing the branch misprediction penaltyStijn Eyerman, James E. Smith, Lieven Eeckhout. 48-58 [doi]
- Revisiting the performance impact of branch predictor latenciesGabriel H. Loh. 59-69 [doi]
- Evaluating the efficacy of statistical simulation for design space explorationAjay Joshi, Joshua J. Yi, Robert H. Bell Jr., Lieven Eeckhout, Lizy Kurian John, David J. Lilja. 70-79 [doi]
- Comparing simulation techniques for microarchitecture-aware floorplanningVidyasagar Nookala, Ying Chen, David J. Lilja, Sachin S. Sapatnekar. 80-88 [doi]
- A statistical multiprocessor cache modelErik Berg, Håkan Zeffer, Erik Hagersten. 89-99 [doi]
- Power efficient resource scaling in partitioned architectures through dynamic heterogeneityNaveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian. 100-111 [doi]
- Compiler-based adaptive fetch throttling for energy-efficiencyHuaping Wang, Yao Guo, Israel Koren, C. Mani Krishna. 112-119 [doi]
- Modeling TCAM power for next generation network devicesBanit Agrawal, Timothy Sherwood. 120-129 [doi]
- Quantitative system designMary K. Vernon. 130 [doi]
- Comparing multinomial and k-means clustering for SimPointGreg Hamerly, Erez Perelman, Brad Calder. 131-142 [doi]
- Considering all starting points for simultaneous multithreading simulationMichael Van Biesbrouck, Lieven Eeckhout, Brad Calder. 143-153 [doi]
- Automatic testcase synthesis and performance model validation for high performance PowerPC processorsRobert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, Ravel Thai. 154-165 [doi]
- Improved stride prefetching using extrinsic stream characteristicsHassan Al-Sukhni, James Holt, Daniel A. Connors. 166-176 [doi]
- Friendly fire: understanding the effects of multiprocessor prefetchesNatalie D. Enright Jerger, Eric L. Hill, Mikko H. Lipasti. 177-188 [doi]
- MESA: reducing cache conflicts by integrating static and run-time methodsXiaoning Ding, Dimitrios S. Nikolopoulos, Song Jiang, Xiaodong Zhang. 189-198 [doi]
- Performance modeling and prediction for scientific Java applicationsRui Zhang, Zoran Budimlic, Ken Kennedy. 199-210 [doi]
- Assessing the impact of reactive workloads on the performance of Web applicationsAdriano M. Pereira, Leonardo Silva, Wagner Meira Jr., Walter Santos. 211-220 [doi]
- Workload sanitation for performance evaluationDror G. Feitelson, Dan Tsafrir. 221-230 [doi]
- ATTILA: a cycle-level execution-driven simulator for modern GPU architecturesVictor Moya Del Barrio, Carlos González, Jordi Roca, Agustin Fernández, Roger Espasa. 231-241 [doi]
- Acquisition and evaluation of long DDR2-SDRAM access sequencesSimon Albert, Sven Kalms, Christian Weiss, Achim Schramm. 242-250 [doi]
- Aestimo: a feedback-directed optimization evaluation toolPaul Berube, José Nelson Amaral. 251-260 [doi]