Automatic testcase synthesis and performance model validation for high performance PowerPC processors

Robert H. Bell Jr., Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, Ravel Thai. Automatic testcase synthesis and performance model validation for high performance PowerPC processors. In 2006 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2006, March 19-21, 2006, Austin, Texas, USA, Proceedings. pages 154-165, IEEE Computer Society, 2006. [doi]

Abstract

Abstract is missing.