Abstract is missing.
- Hamming Distance Based 2-D Reordering with Power Efficient Don't Care Bit Filling: Optimizing the test data compression methodUsha Sandeep Mehta, Niranjan M. Devashrayee, Kanker S. Dasgupta. 1-7 [doi]
- Energy-aware run-time mapping for homogeneous NoCGuang Sun, Yong Li 0008, Yuanyuan Zhang, Li Su, Depeng Jin, Lieguang Zeng. 8-11 [doi]
- Power consumption analysis and energy efficient optimization for turbo decoder implementationPallavi Reddy, Fabien Clermidy, Rasheed Al Khayat, Amer Baghdadi, Michel Jézéquel. 12-17 [doi]
- From Y-chart to seamless integration of application design and performance simulationSubayal Khan, Eila Ovaska, Kari Tiensyrjä, Jari Nurmi. 18-25 [doi]
- Homogeneous MPSoC as baseband signal processing engine for OFDM systemsRoberto Airoldi, Fabio Garzia, Omer Anjum, Jari Nurmi. 26-30 [doi]
- Efficient floating-point texture decompressionTomi Aarnio, Claudio Brunelli, Timo Viitanen. 31-34 [doi]
- A flexible integrated cryptoprocessor for authentication protocols based on hyperelliptic curve cryptographyAlexander Klimm, Matthias Haas, Oliver Sander, Jürgen Becker 0001. 35-42 [doi]
- Process variation and layout mismatch tolerant design of source synchronous links for GALS networks-on-chipAlessandro Strano, Carles Hernández, Federico Silla, Davide Bertozzi. 43-48 [doi]
- Skip-links: A dynamically reconfiguring topology for energy-efficient NoCsChris Jackson, Simon J. Hollis. 49-54 [doi]
- Efficient compensation of delay variations in high-speed network-on-chip data linksSebastian Höppner, Dennis Walter, Holger Eisenreich, René Schüffny. 55-58 [doi]
- Implementation and benchmarking of FFT algorithms on multicore platformsClaudio Brunelli, Roberto Airoldi, Jari Nurmi. 59-62 [doi]
- Parameterized decompression hardware for a program memory compression systemPiia Saastamoinen, Jari Nurmi. 63-67 [doi]
- A case study of hierarchically heterogeneous application modelling using UML and Ptolemy IISanna Määttä, Leandro Soares Indrusiak, Luciano Ost, Leandro Möller, Manfred Glesner, Fernando Gehm Moraes, Jari Nurmi. 68-71 [doi]
- State chart refinement validation from approximately timed to cycle callable modelsRainer Findenig, Wolfgang Ecker. 72-75 [doi]
- MCDA-based methodology for efficient 3D-design space exploration and decisionNguyen Anh Vu Doan, Frédéric Robert, Y. De Smety, Dragomir Milojevic. 76-83 [doi]
- A message-level monitoring protocol for QoS flows in NoCsLeonel Tedesco, Thiago R. da Rosa, Fernando Gehm Moraes. 84-88 [doi]
- H.264/AVC framework for multi-core embedded video encodersTiago Dias, Nuno Roma, Leonel Sousa. 89-92 [doi]
- Low-power, high-throughput deblocking filter for H.264/AVCMuhammad Nadeem, Stephan Wong, Georgi Kuzmanov, Ahsan Shabbir, Muhammad Faisal Nadeem, Fakhar Anjam. 93-98 [doi]
- Reducing instruction memory energy consumption by using Instruction Buffer and after scheduling analysisVladimír Guzma, Teemu Pitkänen, Jarmo Takala. 99-102 [doi]
- On-line dependability enhancement of multiprocessor SoCs by resource managementTimon D. ter Braak, S. T. Burgess, H. Hurskainen, Hans G. Kerkhoff, B. Vermeulen, Xiao Zhang 0002. 103-110 [doi]
- Automatic selection of efficient observability points in combinational gate level circuits using particle swarm optimizationAmirali Ghofrani, Fatemeh Javaheri, Saeed Safari, Zainalabedin Navabi. 111-114 [doi]
- Correct and energy-efficient design of SoCs: The H.264 encoder case studyAdolf Samir Abdallah, Abdoulaye Gamatié, Jean-Luc Dekeyser. 115-120 [doi]
- Interconnect routing of embedded FPGAs using standard VLSI routing toolsThomas Coenen, Jochen Schleifer, Oliver Weiß, Tobias G. Noll. 121-124 [doi]
- Heap access optimizations for a hardware-accelerated Java virtual machineJoonas Tyystjärvi, Tero Säntti, Juha Plosila. 125-128 [doi]
- Hybrid on-chip clocking for sensor nodesSpencer S. Kellis, Nathaniel Gaskin, Bennion Redd, Eric D. Marsman, Richard Brown 0003. 129-132 [doi]
- Program image dissemination protocol for low-energy multihop wireless sensor networksLasse Määttä, Jukka Suhonen, Teemu Laukkarinen, Timo D. Hämäläinen, Marko Hännikäinen. 133-138 [doi]
- EMBRACE-SysC for analysis of NoC-based Spiking Neural Network architecturesSandeep Pande, Fearghal Morgan, Seamus Cawley, Brian McGinley, Snaider Carrillo, Jim Harkin, Liam McDaid. 139-145 [doi]
- Useful-state encoding: Network control with minimal redundancyKris Heyrman, Peter Veelaert. 146-149 [doi]
- A digit-set-interleaved radix-8 division/square root kernel for double-precision floating pointIngo Rust, Tobias G. Noll. 150-153 [doi]
- Exploiting control management to accelerate Radix-4 FFT on a reconfigurable platformWaqar Hussain, Fabio Garzia, Jari Nurmi. 154-157 [doi]
- Design and implementation of an OS-CFAR processor based on a new rank order filtering algorithmZulfiqar Ali, Ali Arshad, Umair Razzaq, Sawaira Sana, Abdul Haseeb Ahmed, Abdullah M. Harris. 158-162 [doi]
- Optimized communication architecture of MPSoCs with a hardware scheduler: A system viewDiandian Zhang, Han Zhang, Jerónimo Castrillón, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Bart Vanthournout. 163-168 [doi]
- LDPC decoder area, timing, and energy models for early quantitative hardware cost estimatesMatthias Korb, Tobias G. Noll. 169-172 [doi]
- Power emulation based DVFS efficiency investigations for embedded systemsAndreas Genser, Christian Bachmann, Christian Steger, Reinhold Weiss, Josef Haid. 173-178 [doi]
- Multiprocessor system and software design for distributed control applicationsSamarjit Chakraborty. 179 [doi]