Abstract is missing.
- Verfahren zur Assertion basierten Verifikation bei der High-Level-SyntheseChristian Schott, Marko Rößler, Ulrich Heinkel. 5-13
- Modulare Verifikation von Non-Mainline Chip-Level FunktionenMatteo Michel, Johannes Koesters, Benedikt Geukes. 14-19
- Formale Verifikation von eingebetteter Software für das Betriebssystem Contiki unter Berücksichtigung von InterruptsThilo Vörtler, Benny Höckner, Petra Hofstedt, Thomas Klotz. 20-29
- Towards Verification of Artificial Neural NetworksKarsten Scheibler, Leonore Winterer, Ralf Wimmer, Bernd Becker. 30-40
- SpecScribe - ein pragmatisch einsetzbares Werkzeug zum AnforderungsmanagementChris Drechsler, Matthias Sauppe, Christian Pätz, Ulrich Heinkel. 41-49
- A Counterexample-Guided Approach to Symbolic Simulation of Hybrid SystemsXian Li, Klaus Schneider 0001. 50-62
- Evaluation of a software-based centralized traffic management inside run-time reconfigurable regions-of-interest of a mesh-based Network-on-Chip topologyPhilipp Gorski, Tim Wegner, Dirk Timmermann. 63-72
- Ein Verfahren zur Bestimmung eines Powermodells von Xilinx MicroBlaze MPSoCs zur Verwendung in Virtuellen PlattformenSören Schreiner, Kim Grüttner, Sven Rosinger, Wolfgang Nebel. 73-82
- Modeling Power Consumption for Design of Power- and Noise-Aware AMS CircuitsXiao Pan, Javier Moreno, Christoph Grimm 0001. 83-92
- Architectural System Modeling for Correct-by-Construction RTL DesignJoakim Urdahl, Dominik Stoffel, Wolfgang Kunz. 93-104
- On the Influence of Hardware Design Options on Schedule Synthesis in Time-Triggered Real-Time SystemsAlexander Biewer, Peter Munk, Jens Gladigau, Christian Haubelt. 105-114
- Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component PlatformsSebastian Graf, Michael Glaß, Jürgen Teich. 115-124
- Model-based Systems Engineering with Matlab/Simulink in the Railway SectorAlexander Nitsch, Benjamin Beichler, Frank Golatowski, Christian Haubelt. 125-134
- A new Mapping Method from Fuzzy Logic System into Fuzzy AutomatonLei Yang, Erik Markert, Ulrich Heinkel. 135-144
- Framework for Varied Sensor Perception in Virtual PrototypesStefan Müller, Dennis Hospach, Joachim Gerlach, Oliver Bringmann, Wolfgang Rosenstiel. 145-154
- HOPE: Hardware Optimized Parallel ExecutionAquib Rashid, Wolfram Hardt. 155-159
- Execution Tracing of C Code for Formal Analysis (Extended Abstract)Heinz Riener, Michael Kirkedal Thomsen, Görschwin Fey. 160-164
- Verbesserung der Fehlersuche in inkonsistenten formalen Modellen (Erweiterte Zusammenfassung)Nils Przigoda, Robert Wille, Rolf Drechsler. 165-172
- Deriving AOC C-Models from D&V Languages for Single- or Multi-Threaded Execution Using C or C++Tobias Strauch. 173-182