Abstract is missing.
- Polynomial word-level verification of arithmetic circuitsMohammed Barhoush, Alireza Mahzoon, Rolf Drechsler. 1-9 [doi]
- Simplification of numeric variables for PLC model checkingIgnacio D. Lopez-Miguel, Borja Fernández Adiego, Jean-Charles Tournier, Enrique Blanco Viñuela, Juan A. Rodríguez-Aguilar. 10-20 [doi]
- Enforcement FSMs: specification and verification of non-functional properties of program executions on MPSoCsKhalil Esper, Stefan Wildermann, Jürgen Teich. 21-31 [doi]
- LION: real-time I/O transfer control for massively parallel processor arraysDominik Walter, Jürgen Teich. 32-43 [doi]
- Learning optimal decisions for stochastic hybrid systemsMathis Niehage, Arnd Hartmanns, Anne Remke. 44-55 [doi]
- A secure insulin infusion system using verification monitorsAbhinandan panda, Srinivas Pinisetty, Partha S. Roop. 56-65 [doi]
- Translating structured sequential programs to dataflow graphsKlaus Schneider. 66-77 [doi]
- Online monitoring of spatio-temporal properties for imprecise signalsEnnio Visconti, Ezio Bartocci, Michele Loreti, Laura Nenzi. 78-88 [doi]
- Verified functional programming of an IoT operating system's bootloaderShenghao Yuan, Jean-Pierre Talpin. 89-97 [doi]
- Controller verification meets controller code: a case studyFelix Freiberger, Stefan Schupp, Holger Hermanns, Erika Ábrahám. 98-103 [doi]
- Translation of continuous function charts to imperative synchronous quartz programsMarcel Christian Werner, Klaus Schneider. 104-110 [doi]
- Design and formal verification of a copland-based attestation protocolAdam Petz, Grant Jurgensen, Perry Alexander. 111-117 [doi]
- Sampling of shape expressions with ShapExNicolas Basset, Thao Dang 0001, Felix Gigler, Cristinel Mateis, Dejan Nickovic. 118-125 [doi]
- SEESAW: a tool for detecting memory vulnerabilities in protocol stack implementationsFarhaan Fowze, Tuba Yavuz. 126-133 [doi]
- Formal modelling of attack scenarios and mitigation strategies in IEEE 1588Kelvin Anto, Partha S. Roop, Akshya K. Swain. 134-141 [doi]