Abstract is missing.
- Evaluation of a concurrent error detection method for microprogrammed control unitsA. Bailas, Larry L. Kinney. 1-10 [doi]
- Modeling the effects of instruction queue loading on a static instruction stream micro-architectureJ. H. Jacobs, Augustus K. Uht, R. C. Ord. 11-20 [doi]
- Trace selection for compiling large C application programs to microcodePohua P. Chang, Wen-mei W. Hwu. 21-29 [doi]
- Flexible processors: a promising application-specific processor design approachAndrew Wolfe, John Paul Shen. 30-39 [doi]
- Implementing a Prolog machine with multiple functional unitsAshok Singhal, Yale N. Patt. 41-49 [doi]
- The trap as a control flow mechanismJ. A. Chandross, H. V. Jagadish, Abhaya Asthana. 50-52 [doi]
- A microcoded real-time executive for numeric support nodes distributed within embedded networksJames O. Bondi. 54-56 [doi]
- Design of a testable RISC-to-CISC control architectureYashwant K. Malaiya, S. Feng. 57-59 [doi]
- Hardware support for large atomic units in dynamically scheduled machinesStephen W. Melvin, Michael Shebanow, Yale N. Patt. 60-63 [doi]
- Multiple instruction issue and single-chip processorsAndrew R. Pleszkun, Gurindar S. Sohi. 64-66 [doi]
- On approximation algorithms for microcode bit minimizationS. S. Ravi, Dechang Gu. 67-69 [doi]
- Mapping of micro data flow computations on parallel microarchitecturesL. Shih, Christos A. Papachristou. 70-72 [doi]
- A high-speed hardware unit for a subset of logic resolutionD. Wong. 73-78 [doi]
- Control store implementation of a high performance VLSI CISCJ. H. Chang, H. H. Chao, K. Lewis, M. Holland. 79-82 [doi]
- Efficient macro-code emulation in hardwired pipelined processorsJ. M. Mulder, R. J. Portier, A. Srivastava, R. in t Velt. 83-90 [doi]
- Data dependency graph bracingVicki H. Allan. 91-93 [doi]
- A new rapid prototyping firmware (RPF) toolM. Andrews, F. Lam. 94-96 [doi]
- Organization of array data for concurrent memory accessMauricio Breternitz Jr., John Paul Shen. 97-99 [doi]
- Microarchitecture modelling through ADLEdil S. Tavares Fernandes. 100-104 [doi]
- A data-flow driven resource allocation in a retargetable microcode compilerHartmut Feuerhahn. 105-107 [doi]
- A microprogramming support tool for pipelined architecturesS. Molnar, M. C. Surles. 108-110 [doi]
- Lazy data routing and greedy scheduling for application-specific signal processorsKen Rimey, Paul N. Hilfinger. 111-115 [doi]
- Global microcode compaction under timing constraintsBogong Su, Jian Wang, Jinshi Xia. 116-118 [doi]
- Microprogramming in multiprocessor data acquisition systemSergio D Angelo, L. Lisca, A. Proserpio, Giacomo R. Sechi. 120-133 [doi]
- The proposal of a computing model for prototypes of microprogrammed machines solving complex problemsE. Binaghi, Gabriella Pasi, Giacomo R. Sechi. 134-138 [doi]