Abstract is missing.
- The bi-Mode Branch PredictorChih-Chieh Lee, I-Cheng K. Chen, Trevor N. Mudge. 4-13 [doi]
- Path-Based Next Trace PredictionQuinn Jacobson, Eric Rotenberg, James E. Smith. 14-23 [doi]
- Alternative Fetch and Issue Policies for the Trace Cache Fetch MechanismDaniel H. Friendly, Sanjay J. Patel, Yale N. Patt. 24-33 [doi]
- Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-OrderJared Stark, Paul Racunas, Yale N. Patt. 34-43 [doi]
- On High-Bandwidth Data Cache Design for Multi-Issue ProcessorsJude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin. 46-56 [doi]
- Run-Time Spatial Locality Detection and OptimizationTeresa L. Johnson, Matthew C. Merten, Wen-mei W. Hwu. 57-64 [doi]
- A Comparison of Data Prefetching on an Access Decoupled and Superscalar MachineG. P. Jones, Nigel P. Topham. 65-70 [doi]
- The Design and Performance of a Conflict-Avoiding CacheNigel P. Topham, Antonio González, José González. 71-80 [doi]
- A Framework for Balancing Control Flow and PredicationDavid I. August, Wen-mei W. Hwu, Scott A. Mahlke. 92-103 [doi]
- Evaluation of Scheduling Techniques on a SPARC-based VLIW TestbedSeongbae Park, SangMin Shim, Soo-Mook Moon. 104-113 [doi]
- Exploiting Dead Value InformationMilo M. K. Martin, Amir Roth, Charles N. Fischer. 125-135 [doi]
- Trace ProcessorsEric Rotenberg, Quinn Jacobson, Yiannakis Sazeides, James E. Smith. 138-148 [doi]
- The Multicluster Architecture: Reducing Cycle Time Through PartitioningKeith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic. 149-159 [doi]
- Out-of-Order Vector ArchitecturesRoger Espasa, Mateo Valero, James E. Smith. 160-170 [doi]
- Initial Results on the Performance and Cost of Vector MicroprocessorsCorinna G. Lee, Derek J. DeVries. 171-182 [doi]
- The Filter Cache: An Energy Efficient Memory StructureJohnson Kin, Munish Gupta, William H. Mangione-Smith. 184-193 [doi]
- Improving Code Density Using Compression TechniquesCharles Lefurgy, Peter L. Bird, I-Cheng K. Chen, Trevor N. Mudge. 194-203 [doi]
- Improving the Accuracy and Performance of Memory Communication Through RenamingGary S. Tyson, Todd M. Austin. 218-227 [doi]
- The Predictability of Data ValuesYiannakis Sazeides, James E. Smith. 248-258 [doi]
- Value ProfilingBrad Calder, Peter Feller, Alan Eustace. 259-269 [doi]
- Can Program Profiling Support Value Prediction?Freddy Gabbay, Avi Mendelson. 270-280 [doi]
- Highly Accurate Data Value Prediction Using Hybrid PredictorsKai Wang, Manoj Franklin. 281-290 [doi]
- ::::ProfileMe::::: Hardware Support for Instruction-Level Profiling on Out-of-Order ProcessorsJeffrey Dean, James E. Hicks, Carl A. Waldspurger, William E. Weihl, George Z. Chrysos. 292-302 [doi]
- Procedure Placement Using Temporal Ordering InformationNicholas C. Gloy, Trevor Blackwell, Michael D. Smith, Brad Calder. 303-313 [doi]
- Predicting Data Cache Misses in Non-Numeric Applications through Correlation ProfilingTodd C. Mowry, Chi-Keung Luk. 314-320 [doi]
- Available Parallelism in Video ApplicationsHeng Liao, Andrew Wolfe. 321-329 [doi]
- MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons SystemsChunho Lee, Miodrag Potkonjak, William H. Mangione-Smith. 330-335 [doi]
- Cache Sensitive Modulo SchedulingF. Jesús Sánchez, Antonio González. 338-348 [doi]
- Unroll-and-Jam Using Uniformly Generated SetsSteve Carr, Yiping Guan. 349-357 [doi]
- Resource-Sensitive Profile-Directed Data Flow Analysis for Code OptimizationRajiv Gupta, David A. Berson, Jesse Zhixi Fang. 358-368 [doi]